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89 lines
1.9 KiB
C
89 lines
1.9 KiB
C
/*
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* Copyright (C) 2020, Koen Zandberg <koen@bergzand.net>
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @defgroup cpu_riscv_common RISC-V common
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* @ingroup cpu
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* @brief Common implementations and headers for the RISC-V CPU
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* @{
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*
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* @file
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* @brief Basic definitions for the RISC-V CPU module
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*
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* @author Koen Zandberg <koen@bergzand.net>
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*/
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#include <stdint.h>
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#include "irq_arch.h"
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#ifndef CPU_H
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#define CPU_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief Initialize rv32i specific core parts of the CPU
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*
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* Initialized the interrupt controller and the enables the FPU if present
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*/
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void riscv_init(void);
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/**
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* @brief Enable the rv32i FPU when present
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*/
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void riscv_fpu_init(void);
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/**
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* @brief Initialization of the interrupt controller
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*/
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void riscv_irq_init(void);
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/**
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* @brief Print the last instruction's address
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*
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* @todo: Not supported
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*/
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static inline void cpu_print_last_instruction(void)
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{
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/* This function must exist else RIOT won't compile */
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}
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/**
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* @brief Convenience function to set bit flags in a register
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*
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* @param reg register to set bits in
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* @param mask bits to set in the register
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*/
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static inline __attribute__((always_inline))
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void cpu_reg_enable_bits(volatile uint32_t *reg, uint32_t mask)
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{
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__atomic_fetch_or(reg, mask, __ATOMIC_RELAXED);
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}
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/**
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* @brief Convenience function to clear bit flags in a register
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*
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* @param reg register to clear bits in
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* @param mask bits to clear in the register
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*/
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static inline __attribute__((always_inline))
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void cpu_reg_disable_bits(volatile uint32_t *reg, uint32_t mask)
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{
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__atomic_fetch_and(reg, ~mask, __ATOMIC_RELAXED);
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* CPU_H */
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/** @} */
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