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250 lines
5.1 KiB
C
250 lines
5.1 KiB
C
/*
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* Copyright (C) 2008, Freie Universitaet Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @file
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* @ingroup LPC2387
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* @brief CC1100 LPC2387 dependend functions
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*
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* @author Heiko Will <hwill@inf.fu-berlin.de>
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* @author Thomas Hillebrandt <hillebra@inf.fu-berlin.de>
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* @version $Revision: 1781 $
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*
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* @note $Id: msba2-cc110x.c 1781 2010-01-26 13:39:36Z hillebra $
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*/
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#include <stdio.h>
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#include <stddef.h>
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/* core */
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#include "irq.h"
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/* cpu */
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#include "cpu.h"
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/* drivers */
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#include "cc110x_legacy.h"
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#include "gpioint.h"
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#define CC1100_GDO0 (FIO0PIN & BIT27) // read serial I/O (GDO0)
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#define CC1100_GDO1 (FIO1PIN & BIT23) // read serial I/O (GDO1)
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#define CC1100_GDO2 (FIO0PIN & BIT28) // read serial I/O (GDO2)
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#define SPI_TX_EMPTY (SSP0SR & SSPSR_TFE)
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#define SPI_BUSY (SSP0SR & SSPSR_BSY)
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#define SPI_RX_AVAIL (SSP0SR & SSPSR_RNE)
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#define CC1100_GDO1_LOW_RETRY (100) // max. retries for GDO1 to go low
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#define CC1100_GDO1_LOW_COUNT (2700) // loop count (timeout ~ 500 us) to wait
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// for GDO1 to go low when CS low
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//#define DEBUG
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#ifdef DEBUG
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static unsigned long time_value;
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static void set_time(void)
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{
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time_value = 0;
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}
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static int test_time(int code)
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{
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time_value++;
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if (time_value > 10000000) {
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printf("CC1100 SPI alarm: %d!\n", code);
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time_value = 0;
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return 1;
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}
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return 0;
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}
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#endif
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int cc110x_get_gdo0(void)
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{
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return CC1100_GDO0;
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}
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int cc110x_get_gdo1(void)
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{
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return CC1100_GDO1;
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}
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int cc110x_get_gdo2(void)
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{
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return CC1100_GDO2;
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}
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void cc110x_spi_init(void)
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{
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// configure chip-select
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FIO1DIR |= BIT21;
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FIO1SET = BIT21;
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// Power
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PCONP |= PCSSP0; // Enable power for SSP0 (default is on)
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// PIN Setup
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PINSEL3 |= BIT8 + BIT9; // Set CLK function to SPI
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PINSEL3 |= BIT14 + BIT15; // Set MISO function to SPI
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PINSEL3 |= BIT16 + BIT17; // Set MOSI function to SPI
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// Interface Setup
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SSP0CR0 = 7;
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// Clock Setup
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uint32_t pclksel;
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uint32_t cpsr;
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lpc2387_pclk_scale(F_CPU / 1000, 6000, &pclksel, &cpsr);
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PCLKSEL1 &= ~(BIT10 | BIT11); // CCLK to PCLK divider
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PCLKSEL1 |= pclksel << 10;
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SSP0CPSR = cpsr;
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// Enable
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SSP0CR1 |= BIT1; // SSP-Enable
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int dummy;
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// Clear RxFIFO:
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while (SPI_RX_AVAIL) { // while RNE (Receive FIFO Not Empty)...
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dummy = SSP0DR; // read data
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}
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/* to suppress unused-but-set-variable */
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(void) dummy;
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}
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uint8_t cc110x_txrx(uint8_t c)
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{
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uint8_t result;
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SSP0DR = c;
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#ifdef DEBUG
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set_time();
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#endif
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while (!SPI_TX_EMPTY) {
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#ifdef DEBUG
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test_time(0);
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#endif
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}
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#ifdef DEBUG
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set_time();
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#endif
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while (SPI_BUSY) {
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#ifdef DEBUG
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test_time(1);
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#endif
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}
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#ifdef DEBUG
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set_time();
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#endif
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while (!SPI_RX_AVAIL) {
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#ifdef DEBUG
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test_time(2);
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#endif
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}
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result = (uint8_t)SSP0DR;
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return result;
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}
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void cc110x_spi_cs(void)
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{
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FIO1CLR = BIT21;
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}
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void
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cc110x_spi_select(void)
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{
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volatile int retry_count = 0;
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volatile int abort_count;
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// Switch to GDO mode input
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PINSEL3 &= ~(BIT14 + BIT15);// Set MISO function to GPIO
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FIO1DIR &= ~BIT23;
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cs_low:
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// CS to low
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abort_count = 0;
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FIO1CLR = BIT21;
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// Wait for SO to go low (voltage regulator
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// has stabilized and the crystal is running)
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loop:
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asm volatile("nop");
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if (CC1100_GDO1) {
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abort_count++;
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if (abort_count > CC1100_GDO1_LOW_COUNT) {
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retry_count++;
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if (retry_count > CC1100_GDO1_LOW_RETRY) {
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puts("[CC1100 SPI] fatal error\n");
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goto final;
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}
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FIO1SET = BIT21; // CS to high
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goto cs_low; // try again
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}
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goto loop;
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}
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final:
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// Switch to SPI mode
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PINSEL3 |= (BIT14 + BIT15); // Set MISO function to SPI
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}
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void
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cc110x_spi_unselect(void)
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{
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FIO1SET = BIT21;
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}
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void cc110x_before_send(void)
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{
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// Disable GDO2 interrupt before sending packet
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cc110x_gdo2_disable();
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}
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void cc110x_after_send(void)
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{
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// Enable GDO2 interrupt after sending packet
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cc110x_gdo2_enable();
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}
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void cc110x_gdo0_enable(void)
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{
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gpioint_set(0, BIT27, GPIOINT_RISING_EDGE, &cc110x_gdo0_irq);
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}
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void cc110x_gdo0_disable(void)
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{
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gpioint_set(0, BIT27, GPIOINT_DISABLE, NULL);
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}
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void cc110x_gdo2_disable(void)
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{
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gpioint_set(0, BIT28, GPIOINT_DISABLE, NULL);
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}
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void cc110x_gdo2_enable(void)
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{
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gpioint_set(0, BIT28, GPIOINT_FALLING_EDGE, &cc110x_gdo2_irq);
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}
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void cc110x_init_interrupts(void)
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{
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// Enable external interrupt on low edge (for GDO2)
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FIO0DIR &= ~BIT28;
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cc110x_gdo2_enable();
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// Enable external interrupt on low edge (for GDO0)
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FIO0DIR &= ~BIT27;
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}
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