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108 lines
3.6 KiB
Makefile
108 lines
3.6 KiB
Makefile
# Target triple for the build. Use arm-none-eabi if you are unsure.
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export TARGET_ARCH ?= arm-none-eabi
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# define build specific options
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export CFLAGS_CPU = -mcpu=$(MCPU) -mlittle-endian -mthumb $(CFLAGS_FPU)
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ifneq (llvm,$(TOOLCHAIN))
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# Clang (observed with v3.7) does not understand -mno-thumb-interwork, only add if
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# not building with LLVM
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export CFLAGS_CPU += -mno-thumb-interwork
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endif
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export CFLAGS_LINK = -ffunction-sections -fdata-sections -fno-builtin -fshort-enums
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export CFLAGS_DBG ?= -ggdb -g3
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export CFLAGS_OPT ?= -Os
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export CFLAGS += $(CFLAGS_CPU) $(CFLAGS_LINK) $(CFLAGS_DBG) $(CFLAGS_OPT)
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export ASFLAGS += $(CFLAGS_CPU) $(CFLAGS_DBG)
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export LINKFLAGS += -L$(RIOTCPU)/$(CPU)/ldscripts -L$(RIOTCPU)/cortexm_common/ldscripts
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export LINKER_SCRIPT ?= $(CPU_MODEL).ld
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export LINKFLAGS += -T$(LINKER_SCRIPT) -Wl,--fatal-warnings
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export LINKFLAGS += $(CFLAGS_CPU) $(CFLAGS_DBG) $(CFLAGS_OPT) -static -lgcc -nostartfiles
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export LINKFLAGS += -Wl,--gc-sections
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# This CPU implementation is using the new core/CPU interface:
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export CFLAGS += -DCOREIF_NG=1
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# Tell the build system that the CPU depends on the Cortex-M common files:
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export USEMODULE += cortexm_common
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# Export the peripheral drivers to be linked into the final binary:
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export USEMODULE += periph
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# include common periph code
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export USEMODULE += periph_common
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export USEMODULE += cortexm_common_periph
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# all cortex MCU's use newlib as libc
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export USEMODULE += newlib
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# set default for CPU_MODEL
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export CPU_MODEL ?= $(CPU)
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# Temporary LLVM/Clang Workaround:
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# report cortex-m0 instead of cortex-m0plus if llvm/clang (<= 3.6.2) is used
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# llvm/clang version 3.6.2 still does not support the cortex-m0plus mcpu type
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ifeq (llvm,$(TOOLCHAIN))
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ifeq (cortex-m0plus,$(CPU_ARCH))
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LLVM_UNSUP = $(shell clang -target arm-none-eabi -mcpu=$(CPU_ARCH) -c -x c /dev/null -o /dev/null \
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> /dev/null 2>&1 || echo 1 )
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ifeq (1,$(LLVM_UNSUP))
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CPU_ARCH = cortex-m0
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endif
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endif
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endif
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# export the CPU model and architecture
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MODEL = $(shell echo $(CPU_MODEL) | tr 'a-z' 'A-Z')
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export CFLAGS += -DCPU_MODEL_$(MODEL)
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ARCH = $(shell echo $(CPU_ARCH) | tr 'a-z-' 'A-Z_')
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export CFLAGS += -DCPU_ARCH_$(ARCH)
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# set the compiler specific CPU and FPU options
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ifeq ($(CPU_ARCH),cortex-m4f)
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# TODO: enable hard floating points for the M4F once the context save/restore
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# code is adjusted to take care of FPU registers
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#export CFLAGS_FPU += -mfloat-abi=hard -mfpu=fpv4-sp-d16
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export MCPU := cortex-m4
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endif
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CFLAGS_FPU ?= -mfloat-abi=soft
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export MCPU ?= $(CPU_ARCH)
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# CMSIS DSP needs to know about the CPU core
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ifneq (,$(filter cmsis-dsp,$(USEPKG)))
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# definition needed to use cmsis-dsp headers
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ifeq ($(CPU_ARCH),cortex-m0)
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export CFLAGS += -DARM_MATH_CM0
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else ifeq ($(CPU_ARCH),cortex-m0plus)
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export CFLAGS += -DARM_MATH_CM0PLUS
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else ifeq ($(CPU_ARCH),cortex-m3)
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export CFLAGS += -DARM_MATH_CM3
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else ifeq ($(CPU_ARCH),cortex-m4)
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export CFLAGS += -DARM_MATH_CM4
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else ifeq ($(CPU_ARCH),cortex-m4f)
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export CFLAGS += -DARM_MATH_CM4
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else ifeq ($(CPU_ARCH),cortex-m7)
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export CFLAGS += -DARM_MATH_CM7
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endif
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endif
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# Explicitly tell the linker to link the startup code.
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# Without this the interrupt vectors will not be linked correctly!
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ifeq ($(COMMON_STARTUP),)
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export UNDEF += $(BINDIR)/cpu/vectors.o
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endif
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# CPU depends on the cortex-m common module, so include it:
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include $(RIOTCPU)/cortexm_common/Makefile.include
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# use the nano-specs of Newlib when available
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USEMODULE += newlib_nano
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export USE_NANO_SPECS = 1
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# Avoid overriding the default rule:
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all:
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# Rule to generate assembly listings from ELF files:
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%.lst: %.elf
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$(OBJDUMP) $(OBJDUMPFLAGS) $< > $@
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