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https://github.com/RIOT-OS/RIOT.git
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113 lines
3.2 KiB
C
113 lines
3.2 KiB
C
/*
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* Copyright (C) 2014 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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* @ingroup boards_f4vi1
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* @{
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*
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* @file
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* @name Peripheral MCU configuration for the F4VI1 board
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*
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* @author Stefan Pfeiffer <pfeiffer@inf.fu-berlin.de>
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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* @author Peter Kietzmann <peter.kietzmann@haw-hamburg.de>
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*/
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#ifndef PERIPH_CONF_H_
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#define PERIPH_CONF_H_
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#include "periph_cpu.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name Clock system configuration
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* @{
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*/
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#define CLOCK_HSE (16000000U) /* external oscillator */
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#define CLOCK_CORECLOCK (168000000U) /* desired core clock frequency */
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/* the actual PLL values are automatically generated */
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#define CLOCK_PLL_M (CLOCK_HSE / 1000000)
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#define CLOCK_PLL_N ((CLOCK_CORECLOCK / 1000000) * 2)
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#define CLOCK_PLL_P (2U)
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#define CLOCK_PLL_Q (CLOCK_PLL_N / 48)
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#define CLOCK_AHB_DIV RCC_CFGR_HPRE_DIV1
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#define CLOCK_APB2_DIV RCC_CFGR_PPRE2_DIV2
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#define CLOCK_APB1_DIV RCC_CFGR_PPRE1_DIV4
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#define CLOCK_FLASH_LATENCY FLASH_ACR_LATENCY_5WS
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/* bus clocks for simplified peripheral initialization, UPDATE MANUALLY! */
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#define CLOCK_AHB (CLOCK_CORECLOCK / 1)
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#define CLOCK_APB2 (CLOCK_CORECLOCK / 2)
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#define CLOCK_APB1 (CLOCK_CORECLOCK / 4)
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/** @} */
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/**
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* @name Timer configuration
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* @{
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*/
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#define TIMER_NUMOF (2U)
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#define TIMER_0_EN 1
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#define TIMER_1_EN 1
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#define TIMER_IRQ_PRIO 1
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/* Timer 0 configuration */
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#define TIMER_0_DEV TIM2
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#define TIMER_0_CHANNELS 4
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#define TIMER_0_FREQ (CLOCK_CORECLOCK / 2)
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#define TIMER_0_MAX_VALUE (0xffffffff)
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#define TIMER_0_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_TIM2EN)
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#define TIMER_0_ISR isr_tim2
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#define TIMER_0_IRQ_CHAN TIM2_IRQn
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/* Timer 1 configuration */
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#define TIMER_1_DEV TIM5
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#define TIMER_1_CHANNELS 4
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#define TIMER_1_FREQ (CLOCK_CORECLOCK / 2)
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#define TIMER_1_MAX_VALUE (0xffffffff)
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#define TIMER_1_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_TIM5EN)
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#define TIMER_1_ISR isr_tim5
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#define TIMER_1_IRQ_CHAN TIM5_IRQn
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/** @} */
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/**
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* @name UART configuration
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* @{
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*/
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static const uart_conf_t uart_config[] = {
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/* device, RCC mask, RX pin, TX pin, pin AF, IRQ channel, DMA stream, DMA */
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{
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USART6, /* device base register */
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RCC_APB2ENR_USART6EN, /* RCC mask */
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GPIO_PIN(PORT_C,7), /* RX pin */
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GPIO_PIN(PORT_C,6), /* TX pin */
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GPIO_AF8, /* pin AF */
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USART6_IRQn, /* IRQ channel */
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14, /* DMA stream */
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5 /* DMA channel */
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},
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};
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/* assign ISR vector names */
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#define UART_0_ISR isr_usart6
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#define UART_0_DMA_ISR isr_dma2_stream6
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/* deduct number of defined UART interfaces */
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#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CONF_H_ */
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/** @} */
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