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https://github.com/RIOT-OS/RIOT.git
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141 lines
3.1 KiB
C
141 lines
3.1 KiB
C
/*
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* Copyright (C) 2018 Inria
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup boards_stm32f429i-disc1
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* @{
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*
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* @file
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* @name Peripheral MCU configuration for the STM32F429I-DISC1 board
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*
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* @author Alexandre Abadie <alexandre.abadie@inria.fr>
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*/
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#ifndef PERIPH_CONF_H
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#define PERIPH_CONF_H
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/* This board provides an LSE */
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#ifndef CONFIG_BOARD_HAS_LSE
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#define CONFIG_BOARD_HAS_LSE 1
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#endif
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/* This board provides an HSE */
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#ifndef CONFIG_BOARD_HAS_HSE
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#define CONFIG_BOARD_HAS_HSE 1
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#endif
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#include "periph_cpu.h"
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#include "clk_conf.h"
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#include "cfg_timer_tim5.h"
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#include "cfg_usb_otg_hs_fs.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name DMA streams configuration
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* @{
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*/
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static const dma_conf_t dma_config[] = {
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{ .stream = 14 }, /* DMA2 Stream 6 - SPI5_TX */
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{ .stream = 13 }, /* DMA2 Stream 5 - SPI5_RX */
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};
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#define DMA_0_ISR isr_dma2_stream6
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#define DMA_1_ISR isr_dma2_stream5
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#define DMA_NUMOF ARRAY_SIZE(dma_config)
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/** @} */
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/**
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* @name UART configuration
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* @{
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*/
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static const uart_conf_t uart_config[] = {
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{
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.dev = USART1,
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.rcc_mask = RCC_APB2ENR_USART1EN,
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.rx_pin = GPIO_PIN(PORT_A, 10),
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.tx_pin = GPIO_PIN(PORT_A, 9),
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.rx_af = GPIO_AF7,
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.tx_af = GPIO_AF7,
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.bus = APB2,
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.irqn = USART1_IRQn,
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#ifdef MODULE_PERIPH_DMA
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.dma = DMA_STREAM_UNDEF,
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.dma_chan = UINT8_MAX,
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#endif
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}
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};
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#define UART_0_ISR (isr_usart1)
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#define UART_NUMOF ARRAY_SIZE(uart_config)
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/** @} */
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/**
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* @name SPI configuration
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* @{
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*/
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static const spi_conf_t spi_config[] = {
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{
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.dev = SPI5,
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.mosi_pin = GPIO_PIN(PORT_F, 9),
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.miso_pin = GPIO_PIN(PORT_F, 8),
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.sclk_pin = GPIO_PIN(PORT_F, 7),
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.cs_pin = GPIO_UNDEF,
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.mosi_af = GPIO_AF5,
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.miso_af = GPIO_AF5,
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.sclk_af = GPIO_AF5,
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.cs_af = GPIO_AF5,
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.rccmask = RCC_APB2ENR_SPI5EN,
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.apbbus = APB2,
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#ifdef MODULE_PERIPH_DMA
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.tx_dma = 0,
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.tx_dma_chan = 7,
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.rx_dma = 1,
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.rx_dma_chan = 7,
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#endif
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}
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};
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#define SPI_NUMOF ARRAY_SIZE(spi_config)
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/** @} */
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/**
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* @name I2C configuration
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* @{
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*/
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static const i2c_conf_t i2c_config[] = {
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{
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.dev = I2C3,
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.speed = I2C_SPEED_NORMAL,
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.scl_pin = GPIO_PIN(PORT_A, 8),
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.sda_pin = GPIO_PIN(PORT_C, 9),
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.scl_af = GPIO_AF4,
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.sda_af = GPIO_AF4,
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.bus = APB1,
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.rcc_mask = RCC_APB1ENR_I2C3EN,
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.clk = CLOCK_APB1,
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.irqn = I2C3_EV_IRQn,
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}
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};
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#define I2C_0_ISR isr_i2c3_ev
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#define I2C_NUMOF ARRAY_SIZE(i2c_config)
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CONF_H */
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/** @} */
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