mirror of
https://github.com/RIOT-OS/RIOT.git
synced 2024-12-29 04:50:03 +01:00
152 lines
3.1 KiB
C
152 lines
3.1 KiB
C
/*
|
|
* Copyright (C) 2014 Freie Universität Berlin
|
|
*
|
|
* This file is subject to the terms and conditions of the GNU Lesser General
|
|
* Public License v2.1. See the file LICENSE in the top level directory for more
|
|
* details.
|
|
*/
|
|
|
|
/**
|
|
* @ingroup boards_fox
|
|
* @{
|
|
*
|
|
* @file
|
|
* @brief Peripheral MCU configuration for the fox board
|
|
*
|
|
* @author Thomas Eichinger <thomas.eichinger@fu-berlin.de>
|
|
*/
|
|
|
|
#ifndef PERIPH_CONF_H
|
|
#define PERIPH_CONF_H
|
|
|
|
/* This board provides an LSE */
|
|
#ifndef CONFIG_BOARD_HAS_LSE
|
|
#define CONFIG_BOARD_HAS_LSE 1
|
|
#endif
|
|
|
|
/* HSE is clocked at 16MHz */
|
|
#ifndef CONFIG_BOARD_HAS_HSE
|
|
#define CONFIG_BOARD_HAS_HSE 1
|
|
#endif
|
|
#define CLOCK_HSE MHZ(16)
|
|
|
|
#include "periph_cpu.h"
|
|
#include "clk_conf.h"
|
|
|
|
#ifdef __cplusplus
|
|
extern "C" {
|
|
#endif
|
|
|
|
/**
|
|
* @name Timer configuration
|
|
* @{
|
|
*/
|
|
static const timer_conf_t timer_config[] = {
|
|
{
|
|
.dev = TIM2,
|
|
.max = 0x0000ffff,
|
|
.rcc_mask = RCC_APB1ENR_TIM2EN,
|
|
.bus = APB1,
|
|
.irqn = TIM2_IRQn
|
|
},
|
|
{
|
|
.dev = TIM3,
|
|
.max = 0x0000ffff,
|
|
.rcc_mask = RCC_APB1ENR_TIM3EN,
|
|
.bus = APB1,
|
|
.irqn = TIM3_IRQn
|
|
}
|
|
};
|
|
|
|
#define TIMER_0_ISR isr_tim2
|
|
#define TIMER_1_ISR isr_tim3
|
|
|
|
#define TIMER_NUMOF ARRAY_SIZE(timer_config)
|
|
/** @} */
|
|
|
|
/**
|
|
* @name UART configuration
|
|
* @{
|
|
*/
|
|
static const uart_conf_t uart_config[] = {
|
|
{
|
|
.dev = USART2,
|
|
.rcc_mask = RCC_APB1ENR_USART2EN,
|
|
.rx_pin = GPIO_PIN(PORT_A, 3),
|
|
.tx_pin = GPIO_PIN(PORT_A, 2),
|
|
.bus = APB1,
|
|
.irqn = USART2_IRQn
|
|
},
|
|
{
|
|
.dev = USART1,
|
|
.rcc_mask = RCC_APB2ENR_USART1EN,
|
|
.rx_pin = GPIO_PIN(PORT_A, 10),
|
|
.tx_pin = GPIO_PIN(PORT_A, 9),
|
|
.bus = APB2,
|
|
.irqn = USART1_IRQn
|
|
}
|
|
};
|
|
|
|
#define UART_0_ISR (isr_usart2)
|
|
#define UART_1_ISR (isr_usart1)
|
|
|
|
#define UART_NUMOF ARRAY_SIZE(uart_config)
|
|
/** @} */
|
|
|
|
/**
|
|
* @name SPI configuration
|
|
* @{
|
|
*/
|
|
static const spi_conf_t spi_config[] = {
|
|
{
|
|
.dev = SPI2,
|
|
.mosi_pin = GPIO_PIN(PORT_B, 15),
|
|
.miso_pin = GPIO_PIN(PORT_B, 14),
|
|
.sclk_pin = GPIO_PIN(PORT_B, 13),
|
|
.cs_pin = GPIO_UNDEF,
|
|
.rccmask = RCC_APB1ENR_SPI2EN,
|
|
.apbbus = APB1
|
|
}
|
|
};
|
|
|
|
#define SPI_NUMOF ARRAY_SIZE(spi_config)
|
|
/** @} */
|
|
|
|
/**
|
|
* @name Real time counter configuration
|
|
* @{
|
|
*/
|
|
#ifndef RTT_FREQUENCY
|
|
#define RTT_FREQUENCY (1) /* in Hz */
|
|
#endif
|
|
/** @} */
|
|
|
|
/**
|
|
* @name I2C configuration
|
|
* @{
|
|
*/
|
|
static const i2c_conf_t i2c_config[] = {
|
|
{
|
|
.dev = I2C1,
|
|
.speed = I2C_SPEED_NORMAL,
|
|
.scl_pin = GPIO_PIN(PORT_B, 6),
|
|
.sda_pin = GPIO_PIN(PORT_B, 7),
|
|
.bus = APB1,
|
|
.rcc_mask = RCC_APB1ENR_I2C1EN,
|
|
.clk = CLOCK_APB1,
|
|
.irqn = I2C1_EV_IRQn
|
|
}
|
|
};
|
|
|
|
#define I2C_0_ISR isr_i2c1_ev
|
|
|
|
#define I2C_NUMOF ARRAY_SIZE(i2c_config)
|
|
/** @} */
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif /* PERIPH_CONF_H */
|
|
/** @} */
|