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207 lines
9.1 KiB
C
207 lines
9.1 KiB
C
/******************************************************************************
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* Filename: hw_vims_h
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* Revised: 2017-01-31 09:37:48 +0100 (Tue, 31 Jan 2017)
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* Revision: 48345
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*
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* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1) Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2) Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
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* be used to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************/
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#ifndef __HW_VIMS_H__
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#define __HW_VIMS_H__
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//*****************************************************************************
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//
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// This section defines the register offsets of
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// VIMS component
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//
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//*****************************************************************************
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// Status
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#define VIMS_O_STAT 0x00000000
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// Control
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#define VIMS_O_CTL 0x00000004
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//*****************************************************************************
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//
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// Register: VIMS_O_STAT
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//
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//*****************************************************************************
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// Field: [5] IDCODE_LB_DIS
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//
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// Icode/Dcode flash line buffer status
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//
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// 0: Enabled or in transition to disabled
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// 1: Disabled and flushed
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#define VIMS_STAT_IDCODE_LB_DIS 0x00000020
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#define VIMS_STAT_IDCODE_LB_DIS_BITN 5
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#define VIMS_STAT_IDCODE_LB_DIS_M 0x00000020
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#define VIMS_STAT_IDCODE_LB_DIS_S 5
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// Field: [4] SYSBUS_LB_DIS
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//
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// Sysbus flash line buffer control
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//
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// 0: Enabled or in transition to disabled
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// 1: Disabled and flushed
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#define VIMS_STAT_SYSBUS_LB_DIS 0x00000010
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#define VIMS_STAT_SYSBUS_LB_DIS_BITN 4
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#define VIMS_STAT_SYSBUS_LB_DIS_M 0x00000010
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#define VIMS_STAT_SYSBUS_LB_DIS_S 4
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// Field: [3] MODE_CHANGING
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//
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// VIMS mode change status
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//
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// 0: VIMS is in the mode defined by MODE
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// 1: VIMS is in the process of changing to the mode given in CTL.MODE
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#define VIMS_STAT_MODE_CHANGING 0x00000008
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#define VIMS_STAT_MODE_CHANGING_BITN 3
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#define VIMS_STAT_MODE_CHANGING_M 0x00000008
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#define VIMS_STAT_MODE_CHANGING_S 3
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// Field: [2] INV
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//
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// This bit is set when invalidation of the cache memory is active / ongoing
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#define VIMS_STAT_INV 0x00000004
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#define VIMS_STAT_INV_BITN 2
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#define VIMS_STAT_INV_M 0x00000004
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#define VIMS_STAT_INV_S 2
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// Field: [1:0] MODE
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//
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// Current VIMS mode
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// ENUMs:
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// OFF VIMS Off mode
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// CACHE VIMS Cache mode
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// GPRAM VIMS GPRAM mode
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#define VIMS_STAT_MODE_W 2
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#define VIMS_STAT_MODE_M 0x00000003
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#define VIMS_STAT_MODE_S 0
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#define VIMS_STAT_MODE_OFF 0x00000003
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#define VIMS_STAT_MODE_CACHE 0x00000001
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#define VIMS_STAT_MODE_GPRAM 0x00000000
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//*****************************************************************************
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//
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// Register: VIMS_O_CTL
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//
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//*****************************************************************************
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// Field: [31] STATS_CLR
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//
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// Set this bit to clear statistic counters.
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#define VIMS_CTL_STATS_CLR 0x80000000
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#define VIMS_CTL_STATS_CLR_BITN 31
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#define VIMS_CTL_STATS_CLR_M 0x80000000
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#define VIMS_CTL_STATS_CLR_S 31
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// Field: [30] STATS_EN
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//
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// Set this bit to enable statistic counters.
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#define VIMS_CTL_STATS_EN 0x40000000
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#define VIMS_CTL_STATS_EN_BITN 30
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#define VIMS_CTL_STATS_EN_M 0x40000000
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#define VIMS_CTL_STATS_EN_S 30
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// Field: [29] DYN_CG_EN
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//
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// 0: The in-built clock gate functionality is bypassed.
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// 1: The in-built clock gate functionality is enabled, automatically gating
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// the clock when not needed.
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#define VIMS_CTL_DYN_CG_EN 0x20000000
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#define VIMS_CTL_DYN_CG_EN_BITN 29
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#define VIMS_CTL_DYN_CG_EN_M 0x20000000
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#define VIMS_CTL_DYN_CG_EN_S 29
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// Field: [5] IDCODE_LB_DIS
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//
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// Icode/Dcode flash line buffer control
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//
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// 0: Enable
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// 1: Disable
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#define VIMS_CTL_IDCODE_LB_DIS 0x00000020
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#define VIMS_CTL_IDCODE_LB_DIS_BITN 5
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#define VIMS_CTL_IDCODE_LB_DIS_M 0x00000020
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#define VIMS_CTL_IDCODE_LB_DIS_S 5
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// Field: [4] SYSBUS_LB_DIS
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//
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// Sysbus flash line buffer control
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//
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// 0: Enable
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// 1: Disable
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#define VIMS_CTL_SYSBUS_LB_DIS 0x00000010
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#define VIMS_CTL_SYSBUS_LB_DIS_BITN 4
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#define VIMS_CTL_SYSBUS_LB_DIS_M 0x00000010
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#define VIMS_CTL_SYSBUS_LB_DIS_S 4
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// Field: [3] ARB_CFG
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//
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// Icode/Dcode and sysbus arbitation scheme
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//
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// 0: Static arbitration (icode/docde > sysbus)
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// 1: Round-robin arbitration
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#define VIMS_CTL_ARB_CFG 0x00000008
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#define VIMS_CTL_ARB_CFG_BITN 3
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#define VIMS_CTL_ARB_CFG_M 0x00000008
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#define VIMS_CTL_ARB_CFG_S 3
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// Field: [2] PREF_EN
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//
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// Tag prefetch control
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//
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// 0: Disabled
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// 1: Enabled
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#define VIMS_CTL_PREF_EN 0x00000004
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#define VIMS_CTL_PREF_EN_BITN 2
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#define VIMS_CTL_PREF_EN_M 0x00000004
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#define VIMS_CTL_PREF_EN_S 2
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// Field: [1:0] MODE
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//
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// VIMS mode request.
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// Write accesses to this field will be blocked while STAT.MODE_CHANGING is set
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// to 1.
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// Note: Transaction from CACHE mode to GPRAM mode should be done through OFF
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// mode to minimize flash block delay.
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// ENUMs:
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// OFF VIMS Off mode
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// CACHE VIMS Cache mode
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// GPRAM VIMS GPRAM mode
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#define VIMS_CTL_MODE_W 2
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#define VIMS_CTL_MODE_M 0x00000003
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#define VIMS_CTL_MODE_S 0
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#define VIMS_CTL_MODE_OFF 0x00000003
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#define VIMS_CTL_MODE_CACHE 0x00000001
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#define VIMS_CTL_MODE_GPRAM 0x00000000
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#endif // __VIMS__
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