mirror of
https://github.com/RIOT-OS/RIOT.git
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63017413e9
Signed-off-by: Jean-Pierre De Jesus DIAZ <me@jeandudey.tech>
141 lines
3.5 KiB
C
141 lines
3.5 KiB
C
/*
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* Copyright (C) 2015 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @defgroup cpu_msp430fxyz TI MSP430F
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* @ingroup cpu
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* @brief Texas Instruments MSP430F family specific code
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* @{
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*
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* @file
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* @brief CPU specific definitions for internal peripheral handling
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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*/
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#ifndef PERIPH_CPU_H
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#define PERIPH_CPU_H
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#include <stdbool.h>
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#include "cpu.h"
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#include "msp430_regs.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief Define a custom type for GPIO pins
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* @{
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*/
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#define HAVE_GPIO_T
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typedef uint16_t gpio_t;
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/** @} */
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/**
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* @brief Definition of a fitting UNDEF value
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*/
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#define GPIO_UNDEF (0xffff)
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/**
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* @brief Mandatory function for defining a GPIO pins
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*/
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#define GPIO_PIN(x, y) ((gpio_t)(((x & 0xff) << 8) | (1 << (y & 0x07))))
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/**
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* @brief No support for HW chip select...
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*/
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#define SPI_HWCS(x) (SPI_CS_UNDEF)
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#ifndef DOXYGEN
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/**
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* @brief Override flank selection values
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* @{
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*/
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#define HAVE_GPIO_FLANK_T
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typedef enum {
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GPIO_FALLING = 0xff, /**< emit interrupt on falling flank */
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GPIO_RISING = 0x00, /**< emit interrupt on rising flank */
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GPIO_BOTH = 0xab /**< not supported -> random value*/
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} gpio_flank_t;
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/** @} */
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/**
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* @brief Override SPI mode selection values
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* @{
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*/
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#define HAVE_SPI_MODE_T
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#ifndef SPI_USE_USCI
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typedef enum {
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SPI_MODE_0 = (USART_TCTL_CKPH), /**< CPOL=0, CPHA=0 */
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SPI_MODE_1 = 0, /**< CPOL=0, CPHA=1 */
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SPI_MODE_2 = (USART_TCTL_CKPL | USART_TCTL_CKPH), /**< CPOL=1, CPHA=0 */
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SPI_MODE_3 = (USART_TCTL_CKPL) /**< CPOL=1, CPHA=1 */
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} spi_mode_t;
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#else
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typedef enum {
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SPI_MODE_0 = (USCI_SPI_CTL0_CKPH), /**< CPOL=0, CPHA=0 */
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SPI_MODE_1 = 0, /**< CPOL=0, CPHA=1 */
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SPI_MODE_2 = (USCI_SPI_CTL0_CKPL | USCI_SPI_CTL0_CKPH), /**< CPOL=1, CPHA=0 */
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SPI_MODE_3 = (USCI_SPI_CTL0_CKPL) /**< CPOL=1, CPHA=1 */
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} spi_mode_t;
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#endif
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/** @} */
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/**
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* @brief Override SPI clock speed selection values
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* @{
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*/
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#define HAVE_SPI_CLK_T
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typedef enum {
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SPI_CLK_100KHZ = 100000, /**< 100KHz */
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SPI_CLK_400KHZ = 400000, /**< 400KHz */
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SPI_CLK_1MHZ = 1000000, /**< 1MHz */
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SPI_CLK_5MHZ = 5000000, /**< 5MHz */
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SPI_CLK_10MHZ = 0, /**< not supported */
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} spi_clk_t;
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/** @} */
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#endif /* ndef DOXYGEN */
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/**
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* @brief Available ports on MSP430 platforms
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*/
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enum {
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P1 = 1, /**< PORT 1 */
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P2 = 2, /**< PORT 2 */
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P3 = 3, /**< PORT 3 */
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P4 = 4, /**< PORT 4 */
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P5 = 5, /**< PORT 5 */
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P6 = 6, /**< PORT 6 */
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};
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/**
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* @brief Enable or disable a pin to be used by peripheral modules
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*
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* @param[in] pin pin to (de-)select
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* @param[in] enable true for enabling peripheral use, false for disabling it
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*/
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void gpio_periph_mode(gpio_t pin, bool enable);
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/**
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* @brief declare needed generic SPI functions
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* @{
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*/
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#define PERIPH_SPI_NEEDS_INIT_CS
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#define PERIPH_SPI_NEEDS_TRANSFER_BYTE
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#define PERIPH_SPI_NEEDS_TRANSFER_REG
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#define PERIPH_SPI_NEEDS_TRANSFER_REGS
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CPU_H */
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/** @} */
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