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78 lines
1.9 KiB
C
78 lines
1.9 KiB
C
/*
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* Copyright (C) 2023 Otto-von-Guericke-Universität Magdeburg
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup boards_common_stm32
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* @{
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*
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* @file
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* @brief Common configuration for STM32 Timer peripheral based on TIM2,
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* TIM15, and TIM16
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*
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* @author Marian Buschsieweke <marian.buschsieweke@ovgu.de>
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*/
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#ifndef CFG_TIMER_TIM2_TIM15_TIM16_H
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#define CFG_TIMER_TIM2_TIM15_TIM16_H
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#include "periph_cpu.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Please note: This likely needs some generalization for use in STM32 families
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* other than L4. */
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/**
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* @name Timer configuration
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* @{
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*/
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static const timer_conf_t timer_config[] = {
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{
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.dev = TIM2,
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.max = 0xffffffff,
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#if defined(RCC_APB1ENR_TIM2EN)
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.rcc_mask = RCC_APB1ENR_TIM2EN,
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#else
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.rcc_mask = RCC_APB1ENR1_TIM2EN,
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#endif
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.bus = APB1,
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.irqn = TIM2_IRQn
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},
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{
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.dev = TIM15,
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.max = 0x0000ffff,
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.rcc_mask = RCC_APB2ENR_TIM15EN,
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.bus = APB2,
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.irqn = TIM1_BRK_TIM15_IRQn,
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.channel_numof = 2,
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},
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{
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.dev = TIM16,
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.max = 0x0000ffff,
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.rcc_mask = RCC_APB2ENR_TIM16EN,
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.bus = APB2,
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.irqn = TIM1_UP_TIM16_IRQn,
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.channel_numof = 1,
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},
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};
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#define TIMER_0_ISR isr_tim2 /**< IRQ of timer at idx 0 */
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#define TIMER_1_ISR isr_tim1_brk_tim15 /**< IRQ of timer at idx 1 */
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#define TIMER_2_ISR isr_tim1_up_tim16 /**< IRQ of timer at idx 2 */
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#define TIMER_NUMOF ARRAY_SIZE(timer_config)
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* CFG_TIMER_TIM2_TIM15_TIM16_H */
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/** @} */
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