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938 lines
32 KiB
C
938 lines
32 KiB
C
/******************************************************************************
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* Filename: aon_rtc.h
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* Revised: 2017-08-16 15:13:43 +0200 (Wed, 16 Aug 2017)
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* Revision: 49593
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*
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* Description: Defines and prototypes for the AON RTC
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*
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* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1) Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2) Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
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* be used to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************/
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//*****************************************************************************
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//
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//! \addtogroup aon_group
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//! @{
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//! \addtogroup aonrtc_api
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//! @{
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//
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//*****************************************************************************
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#ifndef __AON_RTC_H__
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#define __AON_RTC_H__
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//*****************************************************************************
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//
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// If building with a C++ compiler, make all of the definitions in this header
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// have a C binding.
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//
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//*****************************************************************************
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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#include <stdbool.h>
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#include <stdint.h>
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#include "../inc/hw_types.h"
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#include "../inc/hw_memmap.h"
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#include "../inc/hw_aon_rtc.h"
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#include "debug.h"
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#include "../../include/cc26x0_prcm.h"
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//*****************************************************************************
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//
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// Support for DriverLib in ROM:
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// This section renames all functions that are not "static inline", so that
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// calling these functions will default to implementation in flash. At the end
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// of this file a second renaming will change the defaults to implementation in
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// ROM for available functions.
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//
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// To force use of the implementation in flash, e.g. for debugging:
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// - Globally: Define DRIVERLIB_NOROM at project level
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// - Per function: Use prefix "NOROM_" when calling the function
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//
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//*****************************************************************************
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#if !defined(DOXYGEN)
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#define AONRTCCurrentCompareValueGet NOROM_AONRTCCurrentCompareValueGet
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#define AONRTCCurrent64BitValueGet NOROM_AONRTCCurrent64BitValueGet
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#endif
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//*****************************************************************************
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//
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// Values that can be passed to most of the AON_RTC APIs as the ui32Channel
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// parameter.
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//
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//*****************************************************************************
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#define AON_RTC_CH_NONE 0x0 // RTC No channel
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#define AON_RTC_CH0 0x1 // RTC Channel 0
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#define AON_RTC_CH1 0x2 // RTC Channel 1
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#define AON_RTC_CH2 0x4 // RTC Channel 2
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#define AON_RTC_ACTIVE 0x8 // RTC Active
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//*****************************************************************************
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//
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// Values that can be passed to AONRTCConfigDelay as the ui32Delay parameter.
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//
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//*****************************************************************************
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#define AON_RTC_CONFIG_DELAY_NODELAY 0 // NO DELAY
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#define AON_RTC_CONFIG_DELAY_1 1 // Delay of 1 clk cycle
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#define AON_RTC_CONFIG_DELAY_2 2 // Delay of 2 clk cycles
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#define AON_RTC_CONFIG_DELAY_4 3 // Delay of 4 clk cycles
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#define AON_RTC_CONFIG_DELAY_8 4 // Delay of 8 clk cycles
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#define AON_RTC_CONFIG_DELAY_16 5 // Delay of 16 clk cycles
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#define AON_RTC_CONFIG_DELAY_32 6 // Delay of 32 clk cycles
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#define AON_RTC_CONFIG_DELAY_48 7 // Delay of 48 clk cycles
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#define AON_RTC_CONFIG_DELAY_64 8 // Delay of 64 clk cycles
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#define AON_RTC_CONFIG_DELAY_80 9 // Delay of 80 clk cycles
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#define AON_RTC_CONFIG_DELAY_96 10 // Delay of 96 clk cycles
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#define AON_RTC_CONFIG_DELAY_112 11 // Delay of 112 clk cycles
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#define AON_RTC_CONFIG_DELAY_128 12 // Delay of 128 clk cycles
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#define AON_RTC_CONFIG_DELAY_144 13 // Delay of 144 clk cycles
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//*****************************************************************************
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//
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// Values that can be passed to AONRTCSetModeCH1 as the ui32Mode
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// parameter.
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//
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//*****************************************************************************
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#define AON_RTC_MODE_CH1_CAPTURE 1 // Capture mode
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#define AON_RTC_MODE_CH1_COMPARE 0 // Compare Mode
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//*****************************************************************************
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//
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// Values that can be passed to AONRTCSetModeCH2 as the ui32Mode
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// parameter.
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//
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//*****************************************************************************
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#define AON_RTC_MODE_CH2_CONTINUOUS 1 // Continuous mode
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#define AON_RTC_MODE_CH2_NORMALCOMPARE 0 // Normal compare mode
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//*****************************************************************************
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//
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// Mutliplication factor for converting from seconds to corresponding time in
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// the "CompareValue" format.
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// The factor correspond to the compare value format described in the registers
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// \ref AON_RTC_O_CH0CMP, \ref AON_RTC_O_CH1CMP and \ref AON_RTC_O_CH2CMP.
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// Example1:
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// 4 milliseconds in CompareValue format can be written like this:
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// ((uint32_t)( 0.004 * FACTOR_SEC_TO_COMP_VAL_FORMAT ))
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// Example2:
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// 4 seconds in CompareValue format can be written like this:
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// ( 4 * FACTOR_SEC_TO_COMP_VAL_FORMAT )
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//
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//*****************************************************************************
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#define FACTOR_SEC_TO_COMP_VAL_FORMAT 0x00010000
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//*****************************************************************************
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//
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// API Functions and prototypes
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//
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//*****************************************************************************
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//*****************************************************************************
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//
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//! \brief Enable the RTC.
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//!
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//! Enable the AON Real Time Clock.
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//!
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//! \note Event generation for each of the three channels must also be enabled
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//! using the function AONRTCChannelEnable().
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//!
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//! \return None
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//!
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//! \sa AONRTCChannelEnable()
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//
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//*****************************************************************************
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__STATIC_INLINE void
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AONRTCEnable(void)
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{
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// Enable RTC.
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HWREGBITW(AON_RTC_BASE + AON_RTC_O_CTL, AON_RTC_CTL_EN_BITN) = 1;
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}
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//*****************************************************************************
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//
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//! \brief Disable the RTC.
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//!
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//! Disable the AON Real Time Clock.
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//!
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//! \note Event generation for each of the three channels can also be disabled
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//! using the function AONRTCChannelDisable().
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//!
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//! \return None
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//!
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//! \sa AONRTCChannelDisable()
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//
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//*****************************************************************************
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__STATIC_INLINE void
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AONRTCDisable(void)
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{
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// Disable RTC
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HWREGBITW(AON_RTC_BASE + AON_RTC_O_CTL, AON_RTC_CTL_EN_BITN) = 0;
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}
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//*****************************************************************************
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//
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//! \brief Reset the RTC.
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//!
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//! Reset the AON Real Time Clock.
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//!
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//! \return None
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//
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//*****************************************************************************
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__STATIC_INLINE void
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AONRTCReset(void)
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{
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// Reset RTC.
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HWREGBITW(AON_RTC_BASE + AON_RTC_O_CTL, AON_RTC_CTL_RESET_BITN) = 1;
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}
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//*****************************************************************************
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//
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//! \brief Check if the RTC is active (enabled).
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//!
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//! \return Returns the status of the RTC.
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//! - false : RTC is disabled
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//! - true : RTC is enabled
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//
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//*****************************************************************************
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__STATIC_INLINE bool
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AONRTCActive(void)
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{
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// Read if RTC is enabled
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return(HWREGBITW(AON_RTC_BASE + AON_RTC_O_CTL, AON_RTC_CTL_EN_BITN));
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}
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//*****************************************************************************
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//
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//! \brief Check if an RTC channel is active (enabled).
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//!
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//! \param ui32Channel specifies the RTC channel to check status of.
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//! Parameter must be one (and only one) of the following:
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//! - \ref AON_RTC_CH0
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//! - \ref AON_RTC_CH1
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//! - \ref AON_RTC_CH2
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//!
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//! \return Returns the status of the requested channel:
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//! - false : Channel is disabled
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//! - true : Channel is enabled
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//
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//*****************************************************************************
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__STATIC_INLINE bool
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AONRTCChannelActive(uint32_t ui32Channel)
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{
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uint32_t uint32Status = 0;
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if(ui32Channel & AON_RTC_CH0)
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{
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uint32Status = HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH0_EN_BITN);
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}
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if(ui32Channel & AON_RTC_CH1)
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{
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uint32Status = HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH1_EN_BITN);
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}
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if(ui32Channel & AON_RTC_CH2)
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{
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uint32Status = HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH2_EN_BITN);
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}
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return(uint32Status);
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}
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//*****************************************************************************
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//
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//! \brief Configure Event Delay for the RTC.
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//!
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//! Each event from the three individual channels can generate a delayed
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//! event. The delay time for these events is set using this function.
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//! The delay is measured in clock cycles.
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//!
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//! \note There is only one delay setting shared for all three channels.
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//!
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//! \param ui32Delay specifies the delay time for delayed events.
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//! Parameter must be one of the following:
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//! - \ref AON_RTC_CONFIG_DELAY_NODELAY
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//! - \ref AON_RTC_CONFIG_DELAY_1
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//! - \ref AON_RTC_CONFIG_DELAY_2
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//! - \ref AON_RTC_CONFIG_DELAY_4
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//! - \ref AON_RTC_CONFIG_DELAY_8
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//! - \ref AON_RTC_CONFIG_DELAY_16
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//! - \ref AON_RTC_CONFIG_DELAY_32
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//! - \ref AON_RTC_CONFIG_DELAY_48
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//! - \ref AON_RTC_CONFIG_DELAY_64
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//! - \ref AON_RTC_CONFIG_DELAY_80
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//! - \ref AON_RTC_CONFIG_DELAY_96
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//! - \ref AON_RTC_CONFIG_DELAY_112
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//! - \ref AON_RTC_CONFIG_DELAY_128
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//! - \ref AON_RTC_CONFIG_DELAY_144
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//!
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//! \return None.
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//
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//*****************************************************************************
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__STATIC_INLINE void
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AONRTCDelayConfig(uint32_t ui32Delay)
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{
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uint32_t ui32Cfg;
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// Check the arguments.
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ASSERT(ui32Delay <= AON_RTC_CONFIG_DELAY_144);
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ui32Cfg = HWREG(AON_RTC_BASE + AON_RTC_O_CTL);
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ui32Cfg &= ~(AON_RTC_CTL_EV_DELAY_M);
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ui32Cfg |= (ui32Delay << AON_RTC_CTL_EV_DELAY_S);
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HWREG(AON_RTC_BASE + AON_RTC_O_CTL) = ui32Cfg;
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}
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//*****************************************************************************
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//
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//! \brief Configure the source of the combined event.
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//!
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//! A combined delayed event can be generated from a combination of the three
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//! delayed events. Delayed events form the specified channels are OR'ed
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//! together to generate the combined event.
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//!
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//! \param ui32Channels specifies the channels that are to be used for
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//! generating the combined event.
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//! The parameter must be the bitwise OR of any of the following:
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//! - \ref AON_RTC_CH0
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//! - \ref AON_RTC_CH1
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//! - \ref AON_RTC_CH2
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//! - \ref AON_RTC_CH_NONE
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//!
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//! \return None
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//
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//*****************************************************************************
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__STATIC_INLINE void
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AONRTCCombinedEventConfig(uint32_t ui32Channels)
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{
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uint32_t ui32Cfg;
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// Check the arguments.
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ASSERT( (ui32Channels & (AON_RTC_CH0 | AON_RTC_CH1 | AON_RTC_CH2)) ||
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(ui32Channels == AON_RTC_CH_NONE) );
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ui32Cfg = HWREG(AON_RTC_BASE + AON_RTC_O_CTL);
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ui32Cfg &= ~(AON_RTC_CTL_COMB_EV_MASK_M);
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ui32Cfg |= (ui32Channels << AON_RTC_CTL_COMB_EV_MASK_S);
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HWREG(AON_RTC_BASE + AON_RTC_O_CTL) = ui32Cfg;
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}
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//*****************************************************************************
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//
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//! \brief Clear event from a specified channel.
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//!
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//! In case of an active event from the specified channel, the event
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//! will be cleared (de-asserted).
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//!
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//! \param ui32Channel clears the event from one or more RTC channels:
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//! - \ref AON_RTC_CH0
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//! - \ref AON_RTC_CH1
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//! - \ref AON_RTC_CH2
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//!
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//! \return None
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//
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//*****************************************************************************
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__STATIC_INLINE void
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AONRTCEventClear(uint32_t ui32Channel)
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{
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// Check the arguments.
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ASSERT((ui32Channel == AON_RTC_CH0) ||
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(ui32Channel == AON_RTC_CH1) ||
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(ui32Channel == AON_RTC_CH2));
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if(ui32Channel & AON_RTC_CH0)
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{
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HWREG(AON_RTC_BASE + AON_RTC_O_EVFLAGS) = AON_RTC_EVFLAGS_CH0;
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}
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if(ui32Channel & AON_RTC_CH1)
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{
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HWREG(AON_RTC_BASE + AON_RTC_O_EVFLAGS) = AON_RTC_EVFLAGS_CH1;
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}
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if(ui32Channel & AON_RTC_CH2)
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{
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HWREG(AON_RTC_BASE + AON_RTC_O_EVFLAGS) = AON_RTC_EVFLAGS_CH2;
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}
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}
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//*****************************************************************************
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//
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//! \brief Get event status for a specified channel.
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//!
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//! In case of an active event from the specified channel,
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//! this call will return \c true otherwise \c false.
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//!
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//! \param ui32Channel specifies the channel from which to query the event state.
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//! The parameter must be one (and only one) of the following:
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//! - \ref AON_RTC_CH0
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//! - \ref AON_RTC_CH1
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//! - \ref AON_RTC_CH2
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//!
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//! \return Returns \c true if an event has occurred for the given channel,
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//! otherwise \c false.
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//
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//*****************************************************************************
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__STATIC_INLINE bool
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AONRTCEventGet(uint32_t ui32Channel)
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{
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uint32_t uint32Event = 0;
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// Check the arguments.
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ASSERT((ui32Channel == AON_RTC_CH0) ||
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(ui32Channel == AON_RTC_CH1) ||
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(ui32Channel == AON_RTC_CH2));
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if(ui32Channel & AON_RTC_CH0)
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{
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uint32Event = HWREGBITW(AON_RTC_BASE + AON_RTC_O_EVFLAGS, AON_RTC_EVFLAGS_CH0_BITN);
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}
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if(ui32Channel & AON_RTC_CH1)
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{
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uint32Event = HWREGBITW(AON_RTC_BASE + AON_RTC_O_EVFLAGS, AON_RTC_EVFLAGS_CH1_BITN);
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}
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if(ui32Channel & AON_RTC_CH2)
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{
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uint32Event = HWREGBITW(AON_RTC_BASE + AON_RTC_O_EVFLAGS, AON_RTC_EVFLAGS_CH2_BITN);
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}
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return(uint32Event);
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}
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//*****************************************************************************
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//
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//! \brief Get integer part (seconds) of RTC free-running timer.
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//!
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//! Get the value in seconds of RTC free-running timer, i.e. the integer part.
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//! The fractional part is returned from a call to AONRTCFractionGet().
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//!
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//! \note It is recommended to use \ref AONRTCCurrentCompareValueGet() instead
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//! of this function if the <16.16> format is sufficient.
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//!
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//! \note To read a consistent pair of integer and fractional parts,
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//! \ref AONRTCSecGet() must be called first to trigger latching of the
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//! fractional part, which is then read by \ref AONRTCFractionGet(). Interrupts
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//! must be disabled to ensure that these operations are performed atomically.
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//!
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//! \return Returns the integer part of RTC free running timer.
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//!
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//! \sa \ref AONRTCFractionGet() \ref AONRTCCurrentCompareValueGet()
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//
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//*****************************************************************************
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__STATIC_INLINE uint32_t
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AONRTCSecGet(void)
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{
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// The following read gets the seconds, but also latches the fractional
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// part.
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return(HWREG(AON_RTC_BASE + AON_RTC_O_SEC));
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}
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//*****************************************************************************
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//
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//! \brief Get fractional part (sub-seconds) of RTC free-running timer.
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//!
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//! Get the value of the fractional part of RTC free-running timer, i.e. the
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//! sub-second part.
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//!
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//! \note It is recommended to use \ref AONRTCCurrentCompareValueGet() instead
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//! of this function if the <16.16> format is sufficient.
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//!
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//! \note To read a consistent pair of integer and fractional parts,
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//! \ref AONRTCSecGet() must be called first to trigger latching of the
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//! fractional part, which is then read by \ref AONRTCFractionGet(). Interrupts
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//! must be disabled to ensure that these operations are performed atomically.
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//!
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//! \return Returns the fractional part of RTC free running timer.
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//!
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//! \sa \ref AONRTCSecGet() \ref AONRTCCurrentCompareValueGet()
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//
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//*****************************************************************************
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__STATIC_INLINE uint32_t
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AONRTCFractionGet(void)
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{
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// Note1: It is recommended to use AON RTCCurrentCompareValueGet() instead
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// of this function if the <16.16> format is sufficient.
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// Note2: AONRTCSecGet() must be called before this function to get a
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// consistent reading.
|
|
// Note3: Interrupts must be disabled between the call to AONRTCSecGet() and this
|
|
// call since there are interrupt functions that reads AON_RTC_O_SEC
|
|
return(HWREG(AON_RTC_BASE + AON_RTC_O_SUBSEC));
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! \brief Get the sub second increment of the RTC.
|
|
//!
|
|
//! Get the value of the sub-second increment which is added to the RTC
|
|
//! absolute time on every clock tick.
|
|
//!
|
|
//! \note For a precise and temperature independent LF clock (e.g. an LF XTAL)
|
|
//! this value would stay the same across temperature. For temperatue
|
|
//! dependent clock sources like an RC oscillator, this value will change
|
|
//! over time if the application includes functionality for doing temperature
|
|
//! compensation of the RTC clock source. The default value corresponds to a
|
|
//! LF clock frequency of exactly 32.768 kHz.
|
|
//!
|
|
//! \return Returns the sub-second increment of the RTC added to the overall
|
|
//! value on every RTC clock tick.
|
|
//
|
|
//*****************************************************************************
|
|
__STATIC_INLINE uint32_t
|
|
AONRTCSubSecIncrGet(void)
|
|
{
|
|
return(HWREG(AON_RTC_BASE + AON_RTC_O_SUBSECINC));
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! \brief Set operational mode of channel 1.
|
|
//!
|
|
//! Set the operational mode of channel 1. It can be capture or compare mode.
|
|
//! In capture mode, an external event causes the value of the free running
|
|
//! counter to be stored, to remember the time of the event.
|
|
//!
|
|
//! \note The default mode is compare.
|
|
//!
|
|
//! \param ui32Mode specifies the mode for channel 1.
|
|
//! The parameter must be one of the following:
|
|
//! - \ref AON_RTC_MODE_CH1_CAPTURE
|
|
//! - \ref AON_RTC_MODE_CH1_COMPARE
|
|
//!
|
|
//! \return None
|
|
//!
|
|
//! \sa AONRTCModeCh1Get()
|
|
//
|
|
//*****************************************************************************
|
|
__STATIC_INLINE void
|
|
AONRTCModeCh1Set(uint32_t ui32Mode)
|
|
{
|
|
// Check the arguments.
|
|
ASSERT((ui32Mode == AON_RTC_MODE_CH1_CAPTURE) ||
|
|
(ui32Mode == AON_RTC_MODE_CH1_COMPARE));
|
|
|
|
HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH1_CAPT_EN_BITN) = ui32Mode;
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! \brief Get operational mode of channel 1.
|
|
//!
|
|
//! Get the operational mode of channel 1. It can be capture or compare mode.
|
|
//! In capture mode, an external event causes the value of the free running
|
|
//! counter to be stored, to remember the time of the event.
|
|
//!
|
|
//! \return Returns the operational mode of channel 1, one of:
|
|
//! - \ref AON_RTC_MODE_CH1_CAPTURE
|
|
//! - \ref AON_RTC_MODE_CH1_COMPARE
|
|
//!
|
|
//! \sa AONRTCModeCh1Set()
|
|
//
|
|
//*****************************************************************************
|
|
__STATIC_INLINE uint32_t
|
|
AONRTCModeCh1Get(void)
|
|
{
|
|
return(HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH1_CAPT_EN_BITN));
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! \brief Set operational mode of channel 2.
|
|
//!
|
|
//! Set the operational mode of channel 2. It can be in continuous compare
|
|
//! mode or normal compare mode.
|
|
//! In continuous mode, a value is automatically incremented to the channel 2
|
|
//! compare register, upon a channel 2 compare event. This allows channel 2 to
|
|
//! generate a series of completely equidistant events.
|
|
//! The increment value is set by the AONRTCIncValueCh2Set() call.
|
|
//!
|
|
//! \note The default mode is normal compare.
|
|
//!
|
|
//! \param ui32Mode specifies the mode for channel 2.
|
|
//! The parameter must be one of the following:
|
|
//! - \ref AON_RTC_MODE_CH2_CONTINUOUS
|
|
//! - \ref AON_RTC_MODE_CH2_NORMALCOMPARE
|
|
//!
|
|
//! \return None
|
|
//!
|
|
//! \sa AONRTCIncValueCh2Set(), AONRTCIncValueCh2Get()
|
|
//
|
|
//*****************************************************************************
|
|
__STATIC_INLINE void
|
|
AONRTCModeCh2Set(uint32_t ui32Mode)
|
|
{
|
|
// Check the arguments.
|
|
ASSERT((ui32Mode == AON_RTC_MODE_CH2_CONTINUOUS) ||
|
|
(ui32Mode == AON_RTC_MODE_CH2_NORMALCOMPARE));
|
|
|
|
HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH2_CONT_EN_BITN) = ui32Mode;
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! \brief Get operational mode of channel 2.
|
|
//!
|
|
//! Get the operational mode of channel 2. It can be in continuous compare
|
|
//! mode or normal compare mode.
|
|
//! In continuous mode, a value is automatically incremented to the channel 2
|
|
//! compare register, upon a channel 2 compare event. This allows channel 2 to
|
|
//! generate a series of completely equidistant events.
|
|
//! The increment value is set by the AONRTCIncValueCh2Set() call.
|
|
//!
|
|
//! \return Returns the operational mode of channel 2, i.e. one of:
|
|
//! - \ref AON_RTC_MODE_CH2_CONTINUOUS
|
|
//! - \ref AON_RTC_MODE_CH2_NORMALCOMPARE
|
|
//!
|
|
//! \sa AONRTCIncValueCh2Set(), AONRTCIncValueCh2Get()
|
|
//
|
|
//*****************************************************************************
|
|
__STATIC_INLINE uint32_t
|
|
AONRTCModeCh2Get(void)
|
|
{
|
|
return(HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH2_CONT_EN_BITN));
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! \brief Enable event operation for the specified channel.
|
|
//!
|
|
//! Enable the event generation for the specified channel.
|
|
//!
|
|
//! \note The RTC free running clock must also be enabled globally using the
|
|
//! AONRTCEnable() call.
|
|
//!
|
|
//! \param ui32Channel specifies one or more channels to enable:
|
|
//! - \ref AON_RTC_CH0
|
|
//! - \ref AON_RTC_CH1
|
|
//! - \ref AON_RTC_CH2
|
|
//!
|
|
//! \return None
|
|
//!
|
|
//! \sa AONRTCEnable()
|
|
//
|
|
//*****************************************************************************
|
|
__STATIC_INLINE void
|
|
AONRTCChannelEnable(uint32_t ui32Channel)
|
|
{
|
|
// Check the arguments.
|
|
ASSERT((ui32Channel == AON_RTC_CH0) ||
|
|
(ui32Channel == AON_RTC_CH1) ||
|
|
(ui32Channel == AON_RTC_CH2));
|
|
|
|
if(ui32Channel & AON_RTC_CH0)
|
|
{
|
|
HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH0_EN_BITN) = 1;
|
|
}
|
|
|
|
if(ui32Channel & AON_RTC_CH1)
|
|
{
|
|
HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH1_EN_BITN) = 1;
|
|
}
|
|
|
|
if(ui32Channel & AON_RTC_CH2)
|
|
{
|
|
HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH2_EN_BITN) = 1;
|
|
}
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! \brief Disable event operation for the specified channel.
|
|
//!
|
|
//! Disable the event generation for the specified channel.
|
|
//!
|
|
//! \note The RTC free running clock can also be disabled globally using the
|
|
//! AONRTCDisable() call.
|
|
//!
|
|
//! \param ui32Channel specifies one or more channels to disable:
|
|
//! - \ref AON_RTC_CH0
|
|
//! - \ref AON_RTC_CH1
|
|
//! - \ref AON_RTC_CH2
|
|
//!
|
|
//! \return None
|
|
//!
|
|
//! \sa AONRTCDisable()
|
|
//
|
|
//*****************************************************************************
|
|
__STATIC_INLINE void
|
|
AONRTCChannelDisable(uint32_t ui32Channel)
|
|
{
|
|
// Check the arguments.
|
|
ASSERT((ui32Channel == AON_RTC_CH0) ||
|
|
(ui32Channel == AON_RTC_CH1) ||
|
|
(ui32Channel == AON_RTC_CH2));
|
|
|
|
if(ui32Channel & AON_RTC_CH0)
|
|
{
|
|
HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH0_EN_BITN) = 0;
|
|
}
|
|
|
|
if(ui32Channel & AON_RTC_CH1)
|
|
{
|
|
HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH1_EN_BITN) = 0;
|
|
}
|
|
|
|
if(ui32Channel & AON_RTC_CH2)
|
|
{
|
|
HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH2_EN_BITN) = 0;
|
|
}
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! \brief Set the compare value for the given channel.
|
|
//!
|
|
//! Set compare value for the specified channel.
|
|
//!
|
|
//! The format of the compare value is a 16 bit integer and 16 bit fractional
|
|
//! format <16 sec.16 subsec>. The current value of the RTC counter
|
|
//! can be retrieved in a format compatible to the compare register using
|
|
//! \ref AONRTCCurrentCompareValueGet()
|
|
//!
|
|
//! \param ui32Channel specifies one or more channels to set compare value for:
|
|
//! - \ref AON_RTC_CH0
|
|
//! - \ref AON_RTC_CH1
|
|
//! - \ref AON_RTC_CH2
|
|
//! \param ui32CompValue is the compare value to set for the specified channel.
|
|
//! - Format: <16 sec.16 subsec>
|
|
//!
|
|
//! \return None
|
|
//!
|
|
//! \sa AONRTCCurrentCompareValueGet()
|
|
//
|
|
//*****************************************************************************
|
|
__STATIC_INLINE void
|
|
AONRTCCompareValueSet(uint32_t ui32Channel, uint32_t ui32CompValue)
|
|
{
|
|
// Check the arguments.
|
|
ASSERT((ui32Channel == AON_RTC_CH0) ||
|
|
(ui32Channel == AON_RTC_CH1) ||
|
|
(ui32Channel == AON_RTC_CH2));
|
|
|
|
if(ui32Channel & AON_RTC_CH0)
|
|
{
|
|
HWREG(AON_RTC_BASE + AON_RTC_O_CH0CMP) = ui32CompValue;
|
|
}
|
|
|
|
if(ui32Channel & AON_RTC_CH1)
|
|
{
|
|
HWREG(AON_RTC_BASE + AON_RTC_O_CH1CMP) = ui32CompValue;
|
|
}
|
|
|
|
if(ui32Channel & AON_RTC_CH2)
|
|
{
|
|
HWREG(AON_RTC_BASE + AON_RTC_O_CH2CMP) = ui32CompValue;
|
|
}
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! \brief Get the compare value for the given channel.
|
|
//!
|
|
//! Get compare value for the specified channel.
|
|
//!
|
|
//! \param ui32Channel specifies a channel.
|
|
//! The parameter must be one (and only one) of the following:
|
|
//! - \ref AON_RTC_CH0
|
|
//! - \ref AON_RTC_CH1
|
|
//! - \ref AON_RTC_CH2
|
|
//!
|
|
//! \return Returns the stored compare value for the given channel.
|
|
//
|
|
//*****************************************************************************
|
|
__STATIC_INLINE uint32_t
|
|
AONRTCCompareValueGet(uint32_t ui32Channel)
|
|
{
|
|
uint32_t ui32Value = 0;
|
|
|
|
// Check the arguments
|
|
ASSERT((ui32Channel == AON_RTC_CH0) ||
|
|
(ui32Channel == AON_RTC_CH1) ||
|
|
(ui32Channel == AON_RTC_CH2));
|
|
|
|
if(ui32Channel & AON_RTC_CH0)
|
|
{
|
|
ui32Value = HWREG(AON_RTC_BASE + AON_RTC_O_CH0CMP);
|
|
}
|
|
|
|
if(ui32Channel & AON_RTC_CH1)
|
|
{
|
|
ui32Value = HWREG(AON_RTC_BASE + AON_RTC_O_CH1CMP);
|
|
}
|
|
|
|
if(ui32Channel & AON_RTC_CH2)
|
|
{
|
|
ui32Value = HWREG(AON_RTC_BASE + AON_RTC_O_CH2CMP);
|
|
}
|
|
|
|
return(ui32Value);
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! \brief Get the current value of the RTC counter in a format that matches
|
|
//! RTC compare values.
|
|
//!
|
|
//! The compare value registers contains 16 integer and 16 fractional bits.
|
|
//! This function will return the current value of the RTC counter in an
|
|
//! identical format.
|
|
//!
|
|
//! \note Reading SEC both before and after SUBSEC in order to detect if SEC
|
|
//! incremented while reading SUBSEC. If SEC incremented, we can't be sure
|
|
//! which SEC the SUBSEC belongs to, so repeating the sequence then.
|
|
//!
|
|
//! \return Returns the current value of the RTC counter in a <16.16> format
|
|
//! (SEC[15:0].SUBSEC[31:16]).
|
|
//!
|
|
//! \sa \ref AONRTCCompareValueSet()
|
|
//
|
|
//*****************************************************************************
|
|
extern uint32_t AONRTCCurrentCompareValueGet(void);
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! \brief Get the current 64-bit value of the RTC counter.
|
|
//!
|
|
//! \note Reading SEC both before and after SUBSEC in order to detect if SEC
|
|
//! incremented while reading SUBSEC. If SEC incremented, we can't be sure
|
|
//! which SEC the SUBSEC belongs to, so repeating the sequence then.
|
|
//!
|
|
//! \return Returns the current value of the RTC counter in a 64-bits format
|
|
//! (SEC[31:0].SUBSEC[31:0]).
|
|
//
|
|
//*****************************************************************************
|
|
extern uint64_t AONRTCCurrent64BitValueGet(void);
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! \brief Set the channel 2 increment value when operating in continuous mode.
|
|
//!
|
|
//! Set the channel 2 increment value when operating in continuous mode.
|
|
//! The specified value is automatically incremented to the channel 2 compare
|
|
//! register, upon a channel 2 compare event. This allows channel 2 to generate
|
|
//! a series of completely equidistant events.
|
|
//!
|
|
//! \param ui32IncValue is the increment value when operating in continuous mode.
|
|
//!
|
|
//! \return None
|
|
//!
|
|
//! \sa AONRTCIncValueCh2Get()
|
|
//
|
|
//*****************************************************************************
|
|
__STATIC_INLINE void
|
|
AONRTCIncValueCh2Set(uint32_t ui32IncValue)
|
|
{
|
|
HWREG(AON_RTC_BASE + AON_RTC_O_CH2CMPINC) = ui32IncValue;
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! \brief Get the channel2 increment value when operating in continuous mode.
|
|
//!
|
|
//! Get the channel 2 increment value, when channel 2 is operating in
|
|
//! continuous mode.
|
|
//! This value is automatically incremented to the channel 2 compare
|
|
//! register, upon a channel 2 compare event. This allows channel 2 to
|
|
//! generate a series of completely equidistant events.
|
|
//!
|
|
//! \return Returns the channel 2 increment value when operating in continuous
|
|
//! mode.
|
|
//!
|
|
//! \sa AONRTCIncValueCh2Set()
|
|
//
|
|
//*****************************************************************************
|
|
__STATIC_INLINE uint32_t
|
|
AONRTCIncValueCh2Get(void)
|
|
{
|
|
return(HWREG(AON_RTC_BASE + AON_RTC_O_CH2CMPINC));
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! \brief Get the channel 1 capture value.
|
|
//!
|
|
//! Get the channel 1 capture value.
|
|
//! The upper 16 bits of the returned value is the lower 16 bits of the
|
|
//! integer part of the RTC timer. The lower 16 bits of the returned part
|
|
//! is the upper 16 bits of the fractional part.
|
|
//!
|
|
//! \return Returns the channel 1 capture value.
|
|
//
|
|
//*****************************************************************************
|
|
__STATIC_INLINE uint32_t
|
|
AONRTCCaptureValueCh1Get(void)
|
|
{
|
|
return(HWREG(AON_RTC_BASE + AON_RTC_O_CH1CAPT));
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// Support for DriverLib in ROM:
|
|
// Redirect to implementation in ROM when available.
|
|
//
|
|
//*****************************************************************************
|
|
#if !defined(DRIVERLIB_NOROM) && !defined(DOXYGEN)
|
|
#include "../driverlib/rom.h"
|
|
#ifdef ROM_AONRTCCurrentCompareValueGet
|
|
#undef AONRTCCurrentCompareValueGet
|
|
#define AONRTCCurrentCompareValueGet ROM_AONRTCCurrentCompareValueGet
|
|
#endif
|
|
#ifdef ROM_AONRTCCurrent64BitValueGet
|
|
#undef AONRTCCurrent64BitValueGet
|
|
#define AONRTCCurrent64BitValueGet ROM_AONRTCCurrent64BitValueGet
|
|
#endif
|
|
#endif
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// Mark the end of the C bindings section for C++ compilers.
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif // __AON_RTC_H__
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Close the Doxygen group.
|
|
//! @}
|
|
//! @}
|
|
//
|
|
//*****************************************************************************
|