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45b353c6ef
The MSP430 vendor files already provide macros containing register constants and symbols (provided via linker scripts) containing addresses of peripheral registers. So lets make use of that rather than maintaining a long list of constants.
156 lines
4.5 KiB
C
156 lines
4.5 KiB
C
/*
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* Copyright (C) 2015 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_msp430_f2xx_g2xx
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* @{
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*
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* @file
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* @brief Cortex CMSIS style definition of MSP430 registers
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*
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* @todo This file is incomplete, not all registers are listed. Further
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* There are probably some inconsistencies throughout the MSP430
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* family which need to be addressed.
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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*/
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#ifndef F2XX_G2XX_MSP430_REGS_H
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#define F2XX_G2XX_MSP430_REGS_H
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#include <stdint.h>
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#include <stddef.h>
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#include "msp430_regs_common.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief Universal Serial Control Interface Type A (USCI_A) Registers
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*/
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typedef struct {
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REG8 ABCTL; /**< auto baud rate control */
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REG8 IRTCTL; /**< IrDA transmit control */
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REG8 IRRCTL; /**< IrDA receive control */
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REG8 CTL0; /**< control 0 */
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REG8 CTL1; /**< control 1 */
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REG8 BR0; /**< baud rate control 0 */
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REG8 BR1; /**< baud rate control 1 */
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REG8 MCTL; /**< modulation control */
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REG8 STAT; /**< status register */
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REG8 RXBUF; /**< receive buffer */
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REG8 TXBUF; /**< transmit buffer */
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} msp_usci_a_t;
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/**
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* @brief Universal Serial Control Interface Type B (USCI_B) Registers
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*/
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typedef struct {
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REG8 CTL0; /**< control 0 */
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REG8 CTL1; /**< control 1 */
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REG8 BR0; /**< baud rate control 0 */
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REG8 BR1; /**< baud rate control 1 */
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REG8 MCTL; /**< modulation control */
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REG8 STAT; /**< status register */
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REG8 RXBUF; /**< receive buffer */
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REG8 TXBUF; /**< transmit buffer */
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} msp_usci_b_t;
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/**
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* @name USCI clock selection
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*
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* The vendor header files expose clock configurations with hard to read
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* names. So we provide alias with better names
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*
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* @{
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*/
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#define UCSSEL_UCLKI UCSSEL_0 /**< Clock USCI using CLKI (n/a in SPI mode) */
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#define UCSSEL_ACLK UCSSEL_1 /**< Clock USCI using auxiliary clock */
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#define UCSSEL_SMCLK UCSSEL_2 /**< Clock USCI using sub-system master clock */
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/** @} */
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/**
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* @name USCI Modulation Control fields
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*
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* The vendor header files provides bitmasks for each of the possible values
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* from 0..7. But rather than creating a look up table, we can just shift the
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* number in place, if there only would be a UCRBS_SHIFT macro.
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* @{
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*/
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#define UCBRS_MASK UCBRS_7 /**< Bitmask to retrieve the UCRBS field of the
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USCI modulation control register */
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#if (UCBRS_7 == 0x0E) || defined(DOXYGEN)
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#define UCBRS_POS 1 /**< Position of the UCRBS field in the
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UCAxMCTL register */
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#else
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/* The datasheet for the whole MCU family states the field is in bits 3-1,
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* but let's better be safe than sorry here */
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#error "UCBRS field in the UCAxMCTL register at unexpected position."
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#endif
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/** @} */
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/**
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* @brief "Convert" a USCI A into an USCI B interface
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*
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* The USCI peripheral come in two flavors: USCI A and USCI B with the following
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* feature set. When comparing the memory map USCI B is a subset of USCI A
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* registers, which conveniently have the same offsets. It is therefore possible
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* to address USCI A registers as if it was a USCI B interface when operated
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* in SPI mode. This makes implementation of SPI easier.
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*
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* | Name | UART | SPI | I2C | IrDA |
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* |:------ |:----- |:----- |:----- |:----- |
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* | USCI A | ✔ | ✔ | ✗ | ✔ |
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* | USCI B | ✗ | ✔ | ✔ | ✗ |
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*/
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static inline msp_usci_b_t * msp430_usci_b_from_usci_a(msp_usci_a_t *usci_a)
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{
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uintptr_t usci_b = (uintptr_t)usci_a + offsetof(msp_usci_a_t, CTL0);
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return (msp_usci_b_t *)usci_b;
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}
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/**
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* @name Typing of base register objects
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* @{
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*/
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/**
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* @brief USCI_A0 register map
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*
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* @details Provided by linker
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*/
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extern msp_usci_a_t USCI_A0;
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/**
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* @brief USCI_A1 register map
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*
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* @details Provided by linker
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*/
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extern msp_usci_a_t USCI_A1;
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/**
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* @brief USCI_B0 register map
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*
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* @details Provided by linker
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*/
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extern msp_usci_a_t USCI_B0;
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/**
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* @brief USCI_B1 register map
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*
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* @details Provided by linker
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*/
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extern msp_usci_a_t USCI_B1;
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* F2XX_G2XX_MSP430_REGS_H */
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/** @} */
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