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109 lines
2.2 KiB
C
109 lines
2.2 KiB
C
/**
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* CPU specific functions for the RIOT scheduler on NXP LPC1768
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*
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* Copyright (C) 2013 Oliver Hahm <oliver.hahm@inria.fr>
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*
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* This file subject to the terms and conditions of the GNU Lesser General
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* Public License. See the file LICENSE in the top level directory for more
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* details.
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*
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* @file cpu.c
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* @author Kaspar Schleiser <kaspar.schleiser@fu-berlin.de>
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* @author Oliver Hahm <oliver.hahm@inria.fr>
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*/
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#include <stdint.h>
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#include "cpu.h"
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#define ENABLE_DEBUG (0)
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#include "debug.h"
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int inISR(void)
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{
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return (__get_IPSR() & 0xFF);
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}
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unsigned int disableIRQ(void)
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{
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// FIXME PRIMASK is the old CPSR (FAULTMASK ??? BASEPRI ???)
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//PRIMASK lesen
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unsigned int uiPriMask = __get_PRIMASK();
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__disable_irq();
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return uiPriMask;
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}
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void restoreIRQ(unsigned oldPRIMASK)
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{
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//PRIMASK lesen setzen
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__set_PRIMASK(oldPRIMASK);
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}
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__attribute__((naked))
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void HardFault_Handler(void) {
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DEBUG("HARD FAULT\n");
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while(1);
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}
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__attribute__((naked))
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void BusFault_Handler(void) {
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DEBUG("BusFault_Handler\n");
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while(1);
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}
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__attribute__((naked))
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void Usage_Handler(void) {
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DEBUG("Usage FAULT\n");
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while(1);
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}
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__attribute__((naked))
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void WWDG_Handler(void) {
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DEBUG("WWDG FAULT\n");
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while(1);
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}
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void dINT(void)
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{
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__disable_irq();
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}
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void eINT(void)
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{
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__enable_irq();
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}
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void save_context(void)
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{
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/* {r0-r3,r12,LR,PC,xPSR} are saved automatically on exception entry */
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asm("push {r4-r11}");
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/* save unsaved registers */
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asm("push {LR}");
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/* save exception return value */
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asm("ldr r1, =active_thread");
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/* load address of currend pdc */
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asm("ldr r1, [r1]");
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/* deref pdc */
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asm("str sp, [r1]");
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/* write sp to pdc->sp means current threads stack pointer */
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}
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void restore_context(void)
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{
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asm("ldr r0, =active_thread");
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/* load address of currend pdc */
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asm("ldr r0, [r0]");
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/* deref pdc */
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asm("ldr sp, [r0]");
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/* load pdc->sp to sp register */
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asm("pop {r0}");
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/* restore exception retrun value from stack */
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asm("pop {r4-r11}");
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/* load unloaded register */
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// asm("pop {r4}"); /*foo*/
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asm("bx r0"); /* load exception return value to pc causes end of exception*/
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/* {r0-r3,r12,LR,PC,xPSR} are restored automatically on exception return */
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}
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