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134 lines
2.5 KiB
C
134 lines
2.5 KiB
C
/*
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* Copyright (C) 2014 Freie Universität Berlin, Hinnerk van Bruinehsen
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup driver_periph
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* @{
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*
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* @file
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* @brief Low-level UART driver implementation
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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* @author Hinnerk van Bruinehsen <h.v.bruinehsen@fu-berlin.de>
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*
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* @}
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*/
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#include "cpu.h"
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#include "sched.h"
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#include "thread.h"
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#include "periph/uart.h"
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/**
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* @brief Configured device map
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* @{
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*/
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#if UART_NUMOF
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static mega_uart_t *dev[] = {
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#ifdef UART_0
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UART_0,
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#endif
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#ifdef UART_1
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UART_1,
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#endif
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#ifdef UART_2
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UART_2,
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#endif
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#ifdef UART_3
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UART_3
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#endif
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};
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#else
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/* fallback if no UART is defined */
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static const mega_uart_t *dev[] = { NULL };
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#endif
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/**
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* @brief Allocate memory to store the callback functions.
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*/
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static uart_isr_ctx_t isr_ctx[UART_NUMOF];
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int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
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{
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/* make sure the given device is valid */
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if (uart >= UART_NUMOF) {
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return -1;
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}
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/* register interrupt context */
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isr_ctx[uart].rx_cb = rx_cb;
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isr_ctx[uart].arg = arg;
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/* disable and reset UART */
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dev[uart]->CSRB = 0;
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dev[uart]->CSRA = 0;
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/* configure UART to 8N1 mode */
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dev[uart]->CSRC = (1 << UCSZ00) | (1 << UCSZ01);
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/* set clock divider */
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dev[uart]->BRR = CLOCK_CORECLOCK / (16 * baudrate);
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/* enable RX and TX and the RX interrupt */
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dev[uart]->CSRB = ((1 << RXCIE0) | (1 << RXEN0) | (1 << TXEN0));
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return 0;
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}
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void uart_write(uart_t uart, const uint8_t *data, size_t len)
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{
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for (size_t i = 0; i < len; i++) {
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while (!(dev[uart]->CSRA & (1 << UDRE0)));
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dev[uart]->DR = data[i];
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}
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}
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static inline void isr_handler(int num)
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{
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isr_ctx[num].rx_cb(isr_ctx[num].arg, dev[num]->DR);
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if (sched_context_switch_request) {
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thread_yield();
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}
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}
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#ifdef UART_0_ISR
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ISR(UART_0_ISR, ISR_BLOCK)
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{
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__enter_isr();
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isr_handler(0);
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__exit_isr();
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}
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#endif /* UART_0_ISR */
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#ifdef UART_1_ISR
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ISR(UART_1_ISR, ISR_BLOCK)
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{
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__enter_isr();
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isr_handler(1);
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__exit_isr();
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}
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#endif /* UART_1_ISR */
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#ifdef UART_2_ISR
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ISR(UART_2_ISR, ISR_BLOCK)
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{
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__enter_isr();
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isr_handler(2);
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__exit_isr();
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}
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#endif /* UART_2_ISR */
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#ifdef UART_3_ISR
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ISR(UART_3_ISR, ISR_BLOCK)
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{
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__enter_isr();
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isr_handler(3);
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__exit_isr();
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}
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#endif /* UART_3_ISR */
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