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273 lines
8.9 KiB
C
273 lines
8.9 KiB
C
/*
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* Copyright (C) 2015 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_msp430_f2xx_g2xx
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* @{
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*
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* @file
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* @brief CPU specific definitions for internal peripheral handling
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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*/
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#ifndef F2XX_G2XX_PERIPH_CPU_H
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#define F2XX_G2XX_PERIPH_CPU_H
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#include <stdbool.h>
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#include "periph_cpu_common.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name Override SPI mode selection values
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* @{
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*/
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#define HAVE_SPI_MODE_T /**< MSP430 F2xx/G2xx has a custom spi_mode_t */
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/**
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* @brief Support SPI modes
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*
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* | Field | Name | Description |
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* |:------ |:--------------------- |:----------------------------------------------------- |
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* | UCCKPH | Clock phase select | 0 = capture on second edge, 1 = capture on first |
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* | UCCKPL | Clock polarity select | 0 = clock is idle-low, 1 = clock is high idle-high |
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*/
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typedef enum {
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SPI_MODE_0 = (UCCKPH), /**< CPOL=0, CPHA=0 */
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SPI_MODE_1 = 0, /**< CPOL=0, CPHA=1 */
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SPI_MODE_2 = (UCCKPL | UCCKPH), /**< CPOL=1, CPHA=0 */
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SPI_MODE_3 = (UCCKPL) /**< CPOL=1, CPHA=1 */
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} spi_mode_t;
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/** @} */
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/**
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* @name Override SPI clock speed selection values
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* @{
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*/
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#define HAVE_SPI_CLK_T /**< MSP430 F2xx/G2xx has a custom spi_clock_t */
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/**
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* @brief Support SPI clock frequencies
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*/
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typedef enum {
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SPI_CLK_100KHZ = 100000, /**< 100 kHz */
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SPI_CLK_400KHZ = 400000, /**< 400 kHz */
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SPI_CLK_1MHZ = 1000000, /**< 1 MHz */
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SPI_CLK_5MHZ = 5000000, /**< 5 MHz */
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SPI_CLK_10MHZ = SPI_CLK_5MHZ, /**< 10 MHz not supported, falling back to 5 MHz */
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} spi_clk_t;
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/** @} */
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/**
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* @name declare needed generic SPI functions
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* @{
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*/
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#define PERIPH_SPI_NEEDS_INIT_CS /**< use shared spi_init_cs() */
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#define PERIPH_SPI_NEEDS_TRANSFER_BYTE /**< use shared spi_transfer_byte() */
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#define PERIPH_SPI_NEEDS_TRANSFER_REG /**< use shared spi_transfer_reg() */
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#define PERIPH_SPI_NEEDS_TRANSFER_REGS /**< use shared spi_transfer_regs() */
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/** @} */
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/**
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* @brief Identifiers for USCI instances
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*
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* This assigns the four USCI instances (A0, B0, A1, B1) numbers from 0 to 3.
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*/
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typedef enum {
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#ifdef __MSP430_HAS_USCI_AB0__
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MSP430_USCI_ID_A0, /**< USCI A0 */
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MSP430_USCI_ID_B0, /**< USCI B0 */
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#endif
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#ifdef __MSP430_HAS_USCI_AB1__
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MSP430_USCI_ID_A1, /**< USCI A1 */
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MSP430_USCI_ID_B1, /**< USCI B1 */
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#endif
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MSP430_USCI_ID_NUMOF /**< Number of USCI IDs (also: number of USCI instances) */
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} msp430_usci_id_t;
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/**
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* @brief MSP430 F2xx/G2xx USCI configuration
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*
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* @details This is intended to be stored in flash.
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*/
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typedef struct {
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msp430_usci_b_t *dev; /**< The USCI device to use */
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REG8 *interrupt_enable; /**< The interrupt enable register matching the USCI */
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REG8 *interrupt_flag; /**< The interrupt flag register matching the USCI */
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uint8_t tx_irq_mask; /**< The bitmask to enable the TX IRQ for this USCI*/
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uint8_t rx_irq_mask; /**< The bitmask to enable the TX IRQ for this USCI */
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msp430_usci_id_t id; /**< ID of the USCI */
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} msp430_usci_params_t;
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/**
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* @brief MSP430 F2xx/G2xx USCI clock source
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*/
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typedef enum {
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USCI_CLK_UCLKI = UCSSEL_UCLKI, /**< UCLKI clock source (not supported yet) */
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USCI_CLK_AUX = UCSSEL_ACLK, /**< auxiliary clock source */
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USCI_CLK_SUBMAIN = UCSSEL_SMCLK, /**< sub-system master clock source */
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} msp430_usci_clk_t;
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/**
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* @brief MSP430 F2xx/G2xx USCI prescaler configuration
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*/
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typedef struct {
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msp430_usci_clk_t clk_source; /**< Clock source to use */
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uint8_t br0; /**< What to write in the BR0 register */
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uint8_t br1; /**< What to write in the BR1 register */
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uint8_t mctl; /**< USCI modulation control register */
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} msp430_usci_prescaler_t;
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/**
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* @brief MSP430 F2xx/G2xx USCI configuration registers
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*
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* @details Unlike @ref msp430_usci_params_t this contains configuration that
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* may depends on runtime settings
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*/
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typedef struct {
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msp430_usci_prescaler_t prescaler; /**< Prescaler configuration */
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uint8_t ctl0; /**< USCI control register 0 */
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} msp430_usci_conf_t;
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/**
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* @brief MSP430 F2xx/G2xx UART configuration, CPU level
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*
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* The MSP430 F2xx/G2xx has two USCI peripherals which both can be operated in
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* UART mode. Each is connected to a fixed GPIO for RXD and TXD, respectively.
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* Hence, there is not much left for the board to configure anyway, so we just
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* prepare UART configurations at CPU level for the board to refer to. The
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* unused configuration(s) will be garbage collected by the linker.
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*/
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typedef struct {
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msp430_usci_params_t usci_params; /**< The USCI params */
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gpio_t rxd; /**< RXD pin */
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gpio_t txd; /**< TXD pin */
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} msp430_usci_uart_params_t;
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/**
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* @brief MSP430 F2xx/G2xx UART configuration, board level
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*/
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typedef struct {
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const msp430_usci_uart_params_t *uart; /**< The UART configuration to use */
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} uart_conf_t;
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/**
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* @brief MSP430 F2xx/G2xx SPI configuration, CPU level
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*
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* The MSP430 F2xx/G2xx has two USCI peripherals which both can be operated in
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* SPI mode. Each is connected to a fixed GPIO for COPI (MOSI), CIPO (MISO),
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* and SCK, respectively. Hence, there is not much left for the board to
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* configure anyway, so we just prepare UART configurations at CPU level for
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* the board to refer to. The unused configuration(s) will be garbage collected
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* by the linker.
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*/
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typedef struct {
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msp430_usci_params_t usci_params; /**< The USCI parameters */
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gpio_t miso; /**< CIPO (MISO) pin */
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gpio_t mosi; /**< COPI (MOSI) pin */
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gpio_t sck; /**< SCK pin */
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} msp430_usci_spi_params_t;
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/**
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* @brief MSP430 F2xx/G2xx SPI configuration, board level
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*/
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typedef struct {
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const msp430_usci_spi_params_t *spi; /**< The SPI configuration to use */
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} spi_conf_t;
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/**
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* @brief Register map of GPIO PORT 7
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*/
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extern msp430_port_p7_p8_t PORT_7;
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/**
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* @brief Register map of GPIO PORT 8
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*/
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extern msp430_port_p7_p8_t PORT_8;
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/**
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* @brief Acquire and initialize USCI for use a SPI/UART peripheral
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*
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* @param params Parameter identifying the USCI to use
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* @param conf Configuration to initialize the USCI with
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*
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* @note The USCI will be acquired and configured as specified in @p conf.
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* However, it will still be held in software reset and all interrupts
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* will be masked and all interrupt flags be cleared.
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* @warning You cannot enable IRQs while the USCI is still held under reset.
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* @details As currently only for UART USCI IRQs are actually needed, the
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* ISR is implemented in the UART driver. If the SPI or I2C driver
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* would start to make use of IRQs (other than polling for the IRQ
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* flag to be set), the ISRs would need to be moved to the USCI
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* driver and call into the UART/SPI/I2C driver, depending on what
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* driver has currently acquired the USCI.
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*/
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void msp430_usci_acquire(const msp430_usci_params_t *params,
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const msp430_usci_conf_t *conf);
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/**
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* @brief Release an USCI, so that it can be used to provide other peripherals
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*
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* This will also put the USCI in low power mode.
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*/
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void msp430_usci_release(const msp430_usci_params_t *params);
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/**
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* @brief Calculate prescaler settings for the given target frequency
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*
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* @param target_hz The clock frequency (in Hz) to generated with the
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* prescaler
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*
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* @return The calculated prescaler settings
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*
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* @note This will select the auxiliary clock source for well known UART
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* symbol rates up to 9600 Bd, if that is running at 32,768 Hz.
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* Otherwise the submain clock source is selected.
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*/
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msp430_usci_prescaler_t msp430_usci_prescale(uint32_t target_hz);
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/**
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* @brief MSP430 F2xx/G2xx USCI A0 in UART configuration
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*/
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extern const msp430_usci_uart_params_t usci_a0_as_uart;
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/**
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* @brief MSP430 F2xx/G2xx USCI A1 in UART configuration
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*/
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extern const msp430_usci_uart_params_t usci_a1_as_uart;
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/**
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* @brief MSP430 F2xx/G2xx USCI A0 in SPI configuration
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*/
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extern const msp430_usci_spi_params_t usci_a0_as_spi;
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/**
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* @brief MSP430 F2xx/G2xx USCI A1 in SPI configuration
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*/
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extern const msp430_usci_spi_params_t usci_a1_as_spi;
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/**
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* @brief MSP430 F2xx/G2xx USCI B0 in SPI configuration
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*/
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extern const msp430_usci_spi_params_t usci_b0_as_spi;
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/**
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* @brief MSP430 F2xx/G2xx USCI B1 in SPI configuration
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*/
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extern const msp430_usci_spi_params_t usci_b1_as_spi;
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#ifdef __cplusplus
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}
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#endif
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#endif /* F2XX_G2XX_PERIPH_CPU_H */
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/** @} */
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