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80 lines
2.1 KiB
C
80 lines
2.1 KiB
C
/*
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* Copyright (C) 2015-2016 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_saml21
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* @brief CPU specific definitions for internal peripheral handling
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* @{
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*
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* @file
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* @brief CPU specific definitions for internal peripheral handling
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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*/
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#ifndef PERIPH_CPU_H
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#define PERIPH_CPU_H
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#include "periph_cpu_common.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief Available ports on the SAML21 for convenient access
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*/
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enum {
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PA = 0, /**< port A */
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PB = 1, /**< port B */
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};
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/**
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* @brief Generate GPIO mode bitfields
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*
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* We use 3 bit to determine the pin functions:
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* - bit 0: PU or PU
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* - bit 1: input enable
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* - bit 2: pull enable
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*/
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#define GPIO_MODE(pr, ie, pe) (pr | (ie << 1) | (pe << 2))
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#ifndef DOXYGEN
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/**
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* @brief Override GPIO modes
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* @{
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*/
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#define HAVE_GPIO_MODE_T
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typedef enum {
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GPIO_IN = GPIO_MODE(0, 1, 0), /**< IN */
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GPIO_IN_PD = GPIO_MODE(0, 1, 1), /**< IN with pull-down */
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GPIO_IN_PU = GPIO_MODE(1, 1, 1), /**< IN with pull-up */
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GPIO_OUT = GPIO_MODE(0, 0, 0), /**< OUT (push-pull) */
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GPIO_OD = 0xfe, /**< not supported by HW */
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GPIO_OD_PU = 0xff /**< not supported by HW */
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} gpio_mode_t;
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/** @} */
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#endif /* ndef DOXYGEN */
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#define HAVE_ADC_RES_T
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typedef enum {
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ADC_RES_6BIT = 0xff, /**< not supported */
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ADC_RES_8BIT = ADC_CTRLC_RESSEL_8BIT, /**< ADC resolution: 8 bit */
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ADC_RES_10BIT = ADC_CTRLC_RESSEL_10BIT, /**< ADC resolution: 10 bit */
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ADC_RES_12BIT = ADC_CTRLC_RESSEL_12BIT, /**< ADC resolution: 12 bit */
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ADC_RES_14BIT = 0xfe, /**< not supported */
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ADC_RES_16BIT = 0xfd /**< not supported */
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} adc_res_t;
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CPU_H */
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/** @} */
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