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https://github.com/RIOT-OS/RIOT.git
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1865ee9359
cpu/esp8266/include/periph_cpu.h overrides the default definition of adc_res_t from periph/adc with a definition which contains only one resolution. This gives compilation errorss if an application uses other resolutions. According to the documentation, adc_sample should return -1 if the resolution is not supported. All other CPUs override adc_res_t either to add new resolutions or to mark resolutions as unsupported. But they all allow to use them at the interface. Therefore, esp8266 uses now the default definition of adc_res_t and returns -1 if a solution is used in adc_sample that is not supported.
166 lines
3.6 KiB
C
166 lines
3.6 KiB
C
/*
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* Copyright (C) 2018 Gunar Schorcht
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_esp8266
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* @{
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*
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* @file
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* @brief CPU specific definitions and functions for peripheral handling
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*
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* @author Gunar Schorcht <gunar@schorcht.net>
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*/
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#ifndef PERIPH_CPU_H
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#define PERIPH_CPU_H
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#include <stdint.h>
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#include "eagle_soc.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief Length of the CPU_ID in octets
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*/
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#define CPUID_LEN (4U)
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/**
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* @name GPIO configuration of ESP8266
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* @{
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*/
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/**
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* @brief Available ports on the ESP8266
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* @{
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*/
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#define PORT_GPIO 0 /**< port GPIO */
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/** @} */
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/**
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* @brief Definition of a fitting UNDEF value
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*/
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#define GPIO_UNDEF (GPIO_ID_NONE)
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/**
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* @brief Define CPU specific GPIO pin generator macro
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*/
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#define GPIO_PIN(x, y) ((x << 4) | y)
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/**
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* @brief Define CPU specific number of GPIO pins
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*/
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#define GPIO_PIN_NUMOF GPIO_PIN_COUNT+1
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/**
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* @name Predefined GPIO names
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* @{
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*/
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#define GPIO0 (GPIO_PIN(PORT_GPIO,0))
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#define GPIO1 (GPIO_PIN(PORT_GPIO,1))
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#define GPIO2 (GPIO_PIN(PORT_GPIO,2))
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#define GPIO3 (GPIO_PIN(PORT_GPIO,3))
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#define GPIO4 (GPIO_PIN(PORT_GPIO,4))
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#define GPIO5 (GPIO_PIN(PORT_GPIO,5))
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#define GPIO6 (GPIO_PIN(PORT_GPIO,6))
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#define GPIO7 (GPIO_PIN(PORT_GPIO,7))
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#define GPIO8 (GPIO_PIN(PORT_GPIO,8))
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#define GPIO9 (GPIO_PIN(PORT_GPIO,9))
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#define GPIO10 (GPIO_PIN(PORT_GPIO,10))
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#define GPIO11 (GPIO_PIN(PORT_GPIO,11))
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#define GPIO12 (GPIO_PIN(PORT_GPIO,12))
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#define GPIO13 (GPIO_PIN(PORT_GPIO,13))
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#define GPIO14 (GPIO_PIN(PORT_GPIO,14))
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#define GPIO15 (GPIO_PIN(PORT_GPIO,15))
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#define GPIO16 (GPIO_PIN(PORT_GPIO,16))
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/** @} */
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#ifndef DOXYGEN
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#define GPIO0_MASK (BIT(0))
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#define GPIO1_MASK (BIT(1))
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#define GPIO2_MASK (BIT(2))
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#define GPIO3_MASK (BIT(3))
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#define GPIO4_MASK (BIT(4))
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#define GPIO5_MASK (BIT(5))
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#define GPIO6_MASK (BIT(6))
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#define GPIO7_MASK (BIT(7))
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#define GPIO8_MASK (BIT(8))
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#define GPIO9_MASK (BIT(9))
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#define GPIO10_MASK (BIT(10))
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#define GPIO11_MASK (BIT(11))
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#define GPIO12_MASK (BIT(12))
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#define GPIO13_MASK (BIT(13))
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#define GPIO14_MASK (BIT(14))
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#define GPIO15_MASK (BIT(15))
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#define GPIO16_MASK (BIT(16))
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/**
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* @brief Override flank selection values
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* @{
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*/
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#define HAVE_GPIO_FLANK_T
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typedef enum {
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GPIO_NONE = 0,
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GPIO_RISING = 1, /**< emit interrupt on rising flank */
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GPIO_FALLING = 2, /**< emit interrupt on falling flank */
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GPIO_BOTH = 3, /**< emit interrupt on both flanks */
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GPIO_LOW = 4, /**< emit interrupt on low level */
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GPIO_HIGH = 5 /**< emit interrupt on low level */
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} gpio_flank_t;
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/** @} */
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#endif /* DOXYGEN */
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/** @} */
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/**
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* @name I2C configuration
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* @{
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*/
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#define PERIPH_I2C_NEED_READ_REG
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#define PERIPH_I2C_NEED_READ_REGS
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#define PERIPH_I2C_NEED_WRITE_REG
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#define PERIPH_I2C_NEED_WRITE_REGS
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/** @} */
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/**
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* @name Power management configuration
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* @{
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*/
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#define PROVIDES_PM_SET_LOWEST
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#define PROVIDES_PM_RESTART
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#define PROVIDES_PM_OFF
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/** @} */
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/**
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* @name SPI configuration
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* @{
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*/
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#if defined(MODULE_PERIPH_SPI)
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#define PERIPH_SPI_NEEDS_TRANSFER_BYTE
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#define PERIPH_SPI_NEEDS_TRANSFER_REG
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#define PERIPH_SPI_NEEDS_TRANSFER_REGS
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#endif /* MODULE_PERIPH_SPI */
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/**
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* @brief Prevent shared timer functions from being used
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*/
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#define PERIPH_TIMER_PROVIDES_SET
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CPU_H */
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/** @} */
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