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45 lines
1.3 KiB
Makefile
45 lines
1.3 KiB
Makefile
include $(RIOTCPU)/stm32/stm32_info.mk
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FEATURES_PROVIDED += cpu_stm32$(CPU_FAM)
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FEATURES_PROVIDED += periph_cpuid
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FEATURES_PROVIDED += periph_gpio periph_gpio_irq
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FEATURES_PROVIDED += puf_sram
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FEATURES_PROVIDED += periph_uart_modecfg
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FEATURES_PROVIDED += periph_wdt
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ifneq (,$(filter $(CPU_FAM),f0 f1 f3 l0 l1 l4 wb))
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ifeq (,$(filter nucleo-f031k6,$(BOARD)))
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FEATURES_PROVIDED += periph_flashpage
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FEATURES_PROVIDED += periph_flashpage_raw
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endif
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endif
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ifneq (,$(filter $(CPU_FAM),l0 l1))
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FEATURES_PROVIDED += periph_eeprom
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endif
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ifeq (stm32f1,$(CPU_FAM))
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FEATURES_CONFLICT += periph_rtc:periph_rtt
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FEATURES_CONFLICT_MSG += "On the STM32F1, the RTC and RTT map to the same hardware peripheral."
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endif
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# Not all F4 and L0 parts implement a RNG.
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CPU_MODELS_WITHOUT_HWRNG = stm32f401re% stm32f411re% stm32f446re% stm32f446ze% stm32l031k6%
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ifneq (,$(filter $(CPU_FAM),f2 f4 f7 l0 l4 wb))
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ifeq (,$(filter $(CPU_MODELS_WITHOUT_HWRNG),$(CPU_MODEL)))
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FEATURES_PROVIDED += periph_hwrng
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endif
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endif
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ifneq (,$(filter $(CPU_FAM),f2 f4 f7 l1 l4))
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FEATURES_PROVIDED += cortexm_mpu
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endif
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# only some stm32f3 and stm32l0 have an MPU
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STM32_WITH_MPU += stm32f303re stm32f303vc stm32f303ze stm32l052t8
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ifneq (,$(filter $(CPU_MODEL),$(STM32_WITH_MPU)))
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FEATURES_PROVIDED += cortexm_mpu
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endif
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include $(RIOTCPU)/cortexm_common/Makefile.features
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