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https://github.com/RIOT-OS/RIOT.git
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c3fb8ae97a
Use the largest instead of the smallest number of available EPs for this definition. This became necessary to be able to use all EPs of a USB OTG HS peripheral if enabled.
180 lines
5.3 KiB
C
180 lines
5.3 KiB
C
/*
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* Copyright (C) 2016 Freie Universität Berlin
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* 2017 OTA keys S.A.
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_stm32
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* @{
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*
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* @file
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* @brief Shared CPU specific definitions for the STM32 family
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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* @author Vincent Dupont <vincent@otakeys.com>
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*/
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#ifndef PERIPH_CPU_H
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#define PERIPH_CPU_H
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#include <limits.h>
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#include "cpu.h"
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#include "macros/units.h"
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#if defined(CPU_FAM_STM32F0)
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#include "periph/f0/periph_cpu.h"
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#elif defined(CPU_FAM_STM32F1)
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#include "periph/f1/periph_cpu.h"
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#elif defined(CPU_FAM_STM32F2)
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#include "periph/f2/periph_cpu.h"
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#elif defined(CPU_FAM_STM32F3)
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#include "periph/f3/periph_cpu.h"
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#elif defined(CPU_FAM_STM32F4)
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#include "periph/f4/periph_cpu.h"
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#elif defined(CPU_FAM_STM32F7)
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#include "periph/f7/periph_cpu.h"
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#elif defined(CPU_FAM_STM32G0)
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#include "periph/g0/periph_cpu.h"
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#elif defined(CPU_FAM_STM32G4)
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#include "periph/g4/periph_cpu.h"
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#elif defined(CPU_FAM_STM32L0)
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#include "periph/l0/periph_cpu.h"
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#elif defined(CPU_FAM_STM32L1)
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#include "periph/l1/periph_cpu.h"
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#elif defined(CPU_FAM_STM32L4)
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#include "periph/l4/periph_cpu.h"
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#elif defined(CPU_FAM_STM32L5)
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#include "periph/l5/periph_cpu.h"
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#elif defined(CPU_FAM_STM32U5)
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#include "periph/u5/periph_cpu.h"
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#elif defined(CPU_FAM_STM32WB)
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#include "periph/wb/periph_cpu.h"
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#elif defined(CPU_FAM_STM32WL)
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#include "periph/wl/periph_cpu.h"
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#endif
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#include "periph/cpu_backup_ram.h"
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#include "periph/cpu_common.h"
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#include "periph/cpu_dma.h"
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#include "periph/cpu_eth.h"
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#include "periph/cpu_gpio.h"
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#include "periph/cpu_gpio_ll.h"
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#include "periph/cpu_i2c.h"
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#include "periph/cpu_ltdc.h"
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#include "periph/cpu_pm.h"
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#include "periph/cpu_pwm.h"
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#include "periph/cpu_qdec.h"
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#include "periph/cpu_spi.h"
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#include "periph/cpu_timer.h"
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#include "periph/cpu_uart.h"
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#include "periph/cpu_usbdev.h"
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#include "periph/cpu_vbat.h"
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#include "periph/cpu_wdt.h"
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#ifdef MODULE_PERIPH_CAN
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#include "candev_stm32.h"
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief ADC channel configuration data
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*/
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typedef struct {
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gpio_t pin; /**< pin connected to the channel */
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#if !defined(CPU_FAM_STM32F0) && !defined(CPU_FAM_STM32L0) && \
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!defined(CPU_FAM_STM32L1) && !defined(CPU_FAM_STM32WL)
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uint8_t dev; /**< ADCx - 1 device used for the channel */
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#endif
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uint8_t chan; /**< CPU ADC channel connected to the pin */
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} adc_conf_t;
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/**
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* @brief DAC line configuration data
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*/
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typedef struct {
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gpio_t pin; /**< pin connected to the line */
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uint8_t chan; /**< DAC device used for this line */
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} dac_conf_t;
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/**
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* @name PTP clock configuration
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* @{
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*/
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#define HAVE_PTP_CLOCK_READ 1 /**< Native implementation available */
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#define HAVE_PTP_CLOCK_SET 1 /**< Native implementation available */
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#define HAVE_PTP_TIMER_SET_ABSOLUTE 1 /**< Native implementation available */
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/** @} */
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#if !DOXYGEN /* hide implementation details */
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/**
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* @name USB device definitions
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* @{
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*/
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/* Detect the IP version based on the available register define */
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#if defined(USB_OTG_GCCFG_NOVBUSSENS)
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#define STM32_USB_OTG_CID_1x /**< USB OTG FS version 0x00001200 */
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#elif defined(USB_OTG_GCCFG_VBDEN)
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#define STM32_USB_OTG_CID_2x /**< USB OTG FS version 0x00002000 */
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#elif defined(USB)
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#define STM32_USB_FS_CID_1x /**< USB FS version 0x00001200 */
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#endif
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/**
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* @brief Number of endpoints available with the OTG FS peripheral
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* including the control endpoint
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*/
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#if defined(USB_OTG_FS_MAX_IN_ENDPOINTS)
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#define STM32_USB_OTG_FS_NUM_EP (USB_OTG_FS_MAX_IN_ENDPOINTS)
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#elif defined(STM32_USB_OTG_CID_1x)
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#define STM32_USB_OTG_FS_NUM_EP (4) /**< OTG FS with 4 endpoints */
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#elif defined(STM32_USB_OTG_CID_2x)
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#define STM32_USB_OTG_FS_NUM_EP (6) /**< OTG FS with 6 endpoints */
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#endif
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/**
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* @brief Number of endpoints available with the OTG HS peripheral
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* including the control endpoint
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*/
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#if defined(USB_OTG_HS_MAX_IN_ENDPOINTS)
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#define STM32_USB_OTG_HS_NUM_EP (USB_OTG_HS_MAX_IN_ENDPOINTS)
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#elif defined(STM32_USB_OTG_CID_1x)
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#define STM32_USB_OTG_HS_NUM_EP (6) /**< OTG HS with 6 endpoints */
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#elif defined(STM32_USB_OTG_CID_2x)
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#define STM32_USB_OTG_HS_NUM_EP (9) /**< OTG HS with 9 endpoints */
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#endif
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/**
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* @brief Number of IN/OUT endpoints including EP0 as used by USBUS
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*
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* @note USBUS allows only one definition of the number of available EPs, which
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* is then used for all devices. To be able to use all EPs for devices
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* with more EPs, the largest possible number of available EPs for
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* several USB devices is defined here. The driver has to ensure that the
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* number of allocated EPs does not exceed the number of available EPs if
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* a device has less EPs.
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*/
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#if defined(MODULE_PERIPH_USBDEV_HS) && defined(STM32_USB_OTG_HS_NUM_EP)
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#define USBDEV_NUM_ENDPOINTS STM32_USB_OTG_HS_NUM_EP
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#elif defined(STM32_USB_OTG_FS_NUM_EP)
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#define USBDEV_NUM_ENDPOINTS STM32_USB_OTG_FS_NUM_EP
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#else
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#define USBDEV_NUM_ENDPOINTS 8
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#endif
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#endif /* !DOXYGEN */
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CPU_H */
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/** @} */
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