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RIOT/cpu/cortexm_common
Sören Tempel 59676a1f5e Make sure the mpu_noexec_ram regions has the lowest priority
From the ARMv7-M ARM section B3.5.3:

	Where there is an overlap between two regions, the register with
	the highest region number takes priority.

We want to make sure the mpu_noexec_ram region has the lowest
priority to allow the mpu_stack_guard region to overwrite the first N
bytes of it.

This change fixes using mpu_noexec_ram and mpu_stack_guard together.
2020-03-10 11:16:22 +01:00
..
include cpu: Platform specific C11 atomics compat headers 2019-10-24 23:08:36 +02:00
ldscripts cpu/sam0_common: hook up low power RAM as extra heap 2020-02-20 17:11:25 +01:00
periph cpu: cortexm: provide periph_pm for all cortexm 2017-11-06 12:01:19 +01:00
cortexm_init.c cpu/cortexm_common: fix typos 2019-11-23 22:39:36 +01:00
irq_arch.c cpu: adapt to COREIF_NG removal 2017-11-16 14:40:16 +01:00
Makefile cpu: cortexm: fix LTO issue for shared vector table (see #5774) 2017-10-20 22:19:44 +02:00
Makefile.features Add CPU feature for stack smash protections 2020-01-22 15:59:02 +01:00
Makefile.include cpu/cortexm_common: Make Low-Power SRAM available to programs 2019-10-01 18:39:40 +02:00
mpu.c mpu: remove harmful assertion 2020-01-11 13:37:20 +01:00
panic.c cpu*: fix doxygen grouping 2018-06-11 19:12:02 +02:00
thread_arch.c cpu/cortexm: add cortex-m23 support 2019-01-21 17:04:20 +01:00
vectors_cortexm.c Make sure the mpu_noexec_ram regions has the lowest priority 2020-03-10 11:16:22 +01:00