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310eb4970c
On samd5x only the RTC can wake the CPU from Deep Sleep (pm modes 0 & 1). The external interrupt controller is disabled, but we can use the tamper detection of the RTC. If an gpio interrupt is configured on one of the five tamper detect pins, those can be used to wake the CPU from Deep Sleep / Hibernate.
134 lines
3.2 KiB
C
134 lines
3.2 KiB
C
/*
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* Copyright (C) 2019 ML!PA Consulting GmbH
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_samd5x
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* @brief CPU specific definitions for internal peripheral handling
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* @{
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*
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* @file
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* @brief CPU specific definitions for internal peripheral handling
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*
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* @author Benjamin Valentin <benjamin.valentin@ml-pa.com>
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*/
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#ifndef PERIPH_CPU_H
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#define PERIPH_CPU_H
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#include <limits.h>
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#include "macros/units.h"
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#include "periph_cpu_common.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief DFLL runs at at fixed frequency of 48 MHz
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*/
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#define SAM0_DFLL_FREQ_HZ MHZ(48)
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/**
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 * @brief XOSC is used to generate a fixed frequency of 48 MHz
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 */
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#define SAM0_XOSC_FREQ_HZ (XOSC0_FREQUENCY ? XOSC0_FREQUENCY : XOSC1_FREQUENCY)
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/**
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* @brief DPLL must run with at least 96 MHz
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*/
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#define SAM0_DPLL_FREQ_MIN_HZ MHZ(96)
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/**
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* @brief DPLL frequency must not exceed 200 MHz
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*/
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#define SAM0_DPLL_FREQ_MAX_HZ MHZ(20)
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/**
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* @name Power mode configuration
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* @{
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*/
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#define PM_NUM_MODES (3)
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/** @} */
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/**
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* @name SAMD5x GCLK definitions
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* @{
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*/
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enum {
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SAM0_GCLK_MAIN = 0, /**< 120 MHz main clock */
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SAM0_GCLK_32KHZ, /**< 32 kHz clock */
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SAM0_GCLK_TIMER, /**< 4-8 MHz clock for xTimer */
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SAM0_GCLK_PERIPH, /**< 12-48 MHz (DFLL) clock */
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};
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/** @} */
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/**
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* @name GCLK compatibility definitions
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* @{
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*/
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#define SAM0_GCLK_8MHZ SAM0_GCLK_TIMER
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#define SAM0_GCLK_48MHZ SAM0_GCLK_PERIPH
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/** @} */
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/**
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* @brief Override SPI hardware chip select macro
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*
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* As of now, we do not support HW CS, so we always set it to a fixed value
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*/
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#define SPI_HWCS(x) (UINT_MAX - 1)
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#ifndef DOXYGEN
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#define HAVE_ADC_RES_T
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typedef enum {
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ADC_RES_6BIT = 0xff, /**< not supported */
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ADC_RES_8BIT = ADC_CTRLB_RESSEL_8BIT, /**< ADC resolution: 8 bit */
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ADC_RES_10BIT = ADC_CTRLB_RESSEL_10BIT, /**< ADC resolution: 10 bit */
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ADC_RES_12BIT = ADC_CTRLB_RESSEL_12BIT, /**< ADC resolution: 12 bit */
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ADC_RES_14BIT = 0xfe, /**< not supported */
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ADC_RES_16BIT = 0xfd /**< not supported */
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} adc_res_t;
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/** @} */
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#endif /* DOXYGEN */
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/**
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* @brief The MCU has a 12 bit DAC
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*/
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#define DAC_RES_BITS (12)
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/**
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* @brief The MCU has two DAC outputs.
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*/
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#define DAC_NUMOF (2)
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/**
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* @name Real time counter configuration
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* @{
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*/
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#define RTT_MAX_VALUE (0xffffffff)
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#define RTT_CLOCK_FREQUENCY (32768U) /* in Hz */
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#define RTT_MIN_FREQUENCY (RTT_CLOCK_FREQUENCY / 1024U) /* in Hz */
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#define RTT_MAX_FREQUENCY (RTT_CLOCK_FREQUENCY) /* in Hz */
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/** @} */
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/**
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* @brief RTC input pins that can be used for tamper detection and
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* wake from Deep Sleep
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*/
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static const gpio_t rtc_tamper_pins[RTC_NUM_OF_TAMPERS] = {
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GPIO_PIN(PB, 0), GPIO_PIN(PB, 2), GPIO_PIN(PA, 2),
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GPIO_PIN(PC, 0), GPIO_PIN(PC, 1)
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};
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CPU_H */
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/** @} */
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