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https://github.com/RIOT-OS/RIOT.git
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314 lines
8.3 KiB
C
314 lines
8.3 KiB
C
/*
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* Copyright (C) 2016 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup drivers_w5100
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* @{
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*
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* @file
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* @brief Device driver implementation for w5100 Ethernet devices
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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*
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* @}
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*/
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#include <stdio.h>
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#include <string.h>
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#include "log.h"
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#include "assert.h"
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#include "periph/cpuid.h"
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#include "net/ethernet.h"
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#include "net/netdev2/eth.h"
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#include "w5100.h"
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#include "w5100_regs.h"
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#define ENABLE_DEBUG (0)
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#include "debug.h"
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#define SPI_CONF SPI_CONF_FIRST_RISING
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#define RMSR_DEFAULT_VALUE (0x55)
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#define MAC_SEED (0x23)
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#define S0_MEMSIZE (0x2000)
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#define S0_MASK (S0_MEMSIZE - 1)
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#define S0_TX_BASE (0x4000)
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#define S0_RX_BASE (0x6000)
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static const netdev2_driver_t netdev2_driver_w5100;
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static inline void send_addr(w5100_t *dev, uint16_t addr)
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{
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#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
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spi_transfer_byte(dev->p.spi, (addr >> 8), NULL);
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spi_transfer_byte(dev->p.spi, (addr & 0xff), NULL);
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#else
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spi_transfer_byte(dev->p.spi, (addr & 0xff), NULL);
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spi_transfer_byte(dev->p.spi, (addr >> 8), NULL);
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#endif
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}
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static uint8_t rreg(w5100_t *dev, uint16_t reg)
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{
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uint8_t data;
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gpio_clear(dev->p.cs);
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spi_transfer_byte(dev->p.spi, CMD_READ, NULL);
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send_addr(dev, reg++);
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spi_transfer_byte(dev->p.spi, 0, (char *)&data);
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gpio_set(dev->p.cs);
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return data;
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}
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static uint16_t raddr(w5100_t *dev, uint16_t addr_high, uint16_t addr_low)
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{
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uint16_t res = (rreg(dev, addr_high) << 8);
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res |= rreg(dev, addr_low);
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return res;
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}
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static void rchunk(w5100_t *dev, uint16_t addr, uint8_t *data, size_t len)
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{
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/* reading a chunk must be split in multiple single byte reads, as the
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* device does not support auto address increment via SPI */
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for (int i = 0; i < (int)len; i++) {
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data[i] = rreg(dev, addr++);
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}
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}
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static void wreg(w5100_t *dev, uint16_t reg, uint8_t data)
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{
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gpio_clear(dev->p.cs);
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spi_transfer_byte(dev->p.spi, CMD_WRITE, NULL);
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send_addr(dev, reg);
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spi_transfer_byte(dev->p.spi, data, NULL);
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gpio_set(dev->p.cs);
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}
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static void waddr(w5100_t *dev,
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uint16_t addr_high, uint16_t addr_low, uint16_t val)
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{
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wreg(dev, addr_high, (uint8_t)(val >> 8));
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wreg(dev, addr_low, (uint8_t)(val & 0xff));
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}
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static void wchunk(w5100_t *dev, uint16_t addr, uint8_t *data, size_t len)
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{
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/* writing a chunk must be split in multiple single byte writes, as the
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* device does not support auto address increment via SPI */
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for (int i = 0; i < (int)len; i++) {
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wreg(dev, addr++, data[i]);
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}
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}
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static void extint(void *arg)
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{
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w5100_t *dev = (w5100_t *)arg;
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if (dev->nd.event_callback) {
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dev->nd.event_callback(&dev->nd, NETDEV2_EVENT_ISR);
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}
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}
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void w5100_setup(w5100_t *dev, const w5100_params_t *params)
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{
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/* initialize netdev structure */
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dev->nd.driver = &netdev2_driver_w5100;
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dev->nd.event_callback = NULL;
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dev->nd.context = dev;
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/* initialize the device descriptor */
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memcpy(&dev->p, params, sizeof(w5100_params_t));
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/* initialize pins and SPI */
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gpio_init(dev->p.cs, GPIO_OUT);
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gpio_set(dev->p.cs);
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spi_init_master(dev->p.spi, SPI_CONF, dev->p.spi_speed);
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gpio_init_int(dev->p.evt, GPIO_IN, GPIO_FALLING, extint, dev);
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}
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static int init(netdev2_t *netdev)
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{
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w5100_t *dev = (w5100_t *)netdev;
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uint8_t tmp;
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uint8_t hwaddr[ETHERNET_ADDR_LEN];
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#if CPUID_LEN
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uint8_t cpuid[CPUID_LEN];
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#endif
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/* test the SPI connection by reading the value of the RMSR register */
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tmp = rreg(dev, REG_TMSR);
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if (tmp != RMSR_DEFAULT_VALUE) {
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LOG_ERROR("[w5100] error: no SPI connection\n");
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return W5100_ERR_BUS;
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}
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/* reset the device */
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wreg(dev, REG_MODE, MODE_RESET);
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while (rreg(dev, REG_MODE) & MODE_RESET) {};
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/* initialize the device, start with writing the MAC address */
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memset(hwaddr, MAC_SEED, ETHERNET_ADDR_LEN);
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#if CPUID_LEN
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cpuid_get(cpuid);
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for (int i = 0; i < CPUID_LEN; i++) {
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hwaddr[i % ETHERNET_ADDR_LEN] ^= cpuid[i];
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}
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#endif
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hwaddr[0] &= ~0x03; /* no group address and not globally unique */
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wchunk(dev, REG_SHAR0, hwaddr, ETHERNET_ADDR_LEN);
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/* configure all memory to be used by socket 0 */
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wreg(dev, REG_RMSR, RMSR_8KB_TO_S0);
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wreg(dev, REG_TMSR, TMSR_8KB_TO_S0);
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/* configure interrupt pin to trigger on socket 0 events */
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wreg(dev, REG_IMR, IMR_S0_INT);
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/* next we configure socket 0 to work in MACRAW mode */
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wreg(dev, S0_MR, MR_MACRAW);
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wreg(dev, S0_CR, CR_OPEN);
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/* start receiving packets */
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wreg(dev, S0_CR, CR_RECV);
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return 0;
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}
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static uint16_t tx_upload(w5100_t *dev, uint16_t start, void *data, size_t len)
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{
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if ((start + len) >= (S0_TX_BASE + S0_MEMSIZE)) {
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size_t limit = ((S0_TX_BASE + S0_MEMSIZE) - start);
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wchunk(dev, start, data, limit);
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wchunk(dev, S0_TX_BASE, &((uint8_t *)data)[limit], len - limit);
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return (S0_TX_BASE + limit);
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}
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else {
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wchunk(dev, start, data, len);
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waddr(dev, S0_TX_WR0, S0_TX_WR1, start + len);
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return (start + len);
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}
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}
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static int send(netdev2_t *netdev, const struct iovec *vector, int count)
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{
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w5100_t *dev = (w5100_t *)netdev;
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int sum = 0;
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uint16_t pos = raddr(dev, S0_TX_WR0, S0_TX_WR1);
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/* the register is only set correctly after the first send pkt, so we need
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* this fix here */
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if (pos == 0) {
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pos = S0_TX_BASE;
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}
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for (int i = 0; i < count; i++) {
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pos = tx_upload(dev, pos, vector[i].iov_base, vector[i].iov_len);
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sum += vector[i].iov_len;
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}
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waddr(dev, S0_TX_WR0, S0_TX_WR1, pos);
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/* trigger the sending process */
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wreg(dev, S0_CR, CR_SEND_MAC);
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while (!(rreg(dev, S0_IR) & IR_SEND_OK)) {};
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wreg(dev, S0_IR, IR_SEND_OK);
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DEBUG("[w5100] send: transferred %i byte (at 0x%04x)\n", sum, (int)pos);
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return sum;
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}
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static int recv(netdev2_t *netdev, char *buf, int len, void *info)
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{
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w5100_t *dev = (w5100_t *)netdev;
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int n = 0;
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uint16_t num = raddr(dev, S0_RX_RSR0, S0_RX_RSR1);
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if (num > 0) {
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/* find the size of the next packet in the RX buffer */
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uint16_t rp = raddr(dev, S0_RX_RD0, S0_RX_RD1);
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uint16_t psize = raddr(dev, (S0_RX_BASE + (rp & S0_MASK)),
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(S0_RX_BASE + ((rp + 1) & S0_MASK)));
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n = psize - 2;
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DEBUG("[w5100] recv: got packet of %i byte (at 0x%04x)\n", n, (int)rp);
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/* read the actual data into the given buffer if wanted */
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if (buf != NULL) {
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uint16_t pos = rp + 2;
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len = (n <= len) ? n : len;
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for (int i = 0; i < (int)len; i++) {
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buf[i] = rreg(dev, (S0_RX_BASE + ((pos++) & S0_MASK)));
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}
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DEBUG("[w5100] recv: read %i byte from device (at 0x%04x)\n",
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n, (int)rp);
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/* set the new read pointer address */
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waddr(dev, S0_RX_RD0, S0_RX_RD1, rp += psize);
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wreg(dev, S0_CR, CR_RECV);
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/* if RX buffer now empty, clear RECV interrupt flag */
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if ((num - psize) == 0) {
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wreg(dev, S0_IR, IR_RECV);
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}
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}
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}
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return n;
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}
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static void isr(netdev2_t *netdev)
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{
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w5100_t *dev = (w5100_t *)netdev;
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/* we only react on RX events, and if we see one, we read from the RX buffer
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* until it is empty */
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while (rreg(dev, S0_IR) & IR_RECV) {
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DEBUG("[w5100] netdev2 RX complete\n");
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netdev->event_callback(netdev, NETDEV2_EVENT_RX_COMPLETE);
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}
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}
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static int get(netdev2_t *netdev, netopt_t opt, void *value, size_t max_len)
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{
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w5100_t *dev = (w5100_t *)netdev;
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int res = 0;
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switch (opt) {
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case NETOPT_ADDRESS:
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assert(max_len >= ETHERNET_ADDR_LEN);
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rchunk(dev, REG_SHAR0, value, ETHERNET_ADDR_LEN);
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res = ETHERNET_ADDR_LEN;
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break;
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default:
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res = netdev2_eth_get(netdev, opt, value, max_len);
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break;
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}
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return res;
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}
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static const netdev2_driver_t netdev2_driver_w5100 = {
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.send = send,
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.recv = recv,
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.init = init,
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.isr = isr,
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.get = get,
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.set = netdev2_eth_set,
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};
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