mirror of
https://github.com/RIOT-OS/RIOT.git
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182 lines
4.3 KiB
C
182 lines
4.3 KiB
C
/*
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* Copyright (C) 2021 Inria
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup boards_stm32f746g-disco
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* @{
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*
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* @file
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* @brief Configuration of CPU peripherals for STM32F746G-DISCO board
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*
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* @author Alexandre Abadie <alexandre.abadie@inria.fr>
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*/
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#ifndef PERIPH_CONF_H
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#define PERIPH_CONF_H
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/* This board provides an LSE */
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#ifndef CONFIG_BOARD_HAS_LSE
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#define CONFIG_BOARD_HAS_LSE 1
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#endif
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/* This board provides an HSE */
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#ifndef CONFIG_BOARD_HAS_HSE
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#define CONFIG_BOARD_HAS_HSE 1
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#endif
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/* The HSE provides a 25MHz clock */
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#define CLOCK_HSE MHZ(25)
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#include <stdint.h>
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#include "periph_cpu.h"
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#include "clk_conf.h"
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#include "cfg_i2c1_pb8_pb9.h"
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#include "cfg_rtt_default.h"
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#include "cfg_timer_tim2.h"
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#include "cfg_usb_otg_fs.h"
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#include "mii.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name DMA streams configuration
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* @{
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*/
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static const dma_conf_t dma_config[] = {
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{ .stream = 15 }, /* DMA2 Stream 7 - USART1_TX */
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{ .stream = 14 }, /* DMA2 Stream 6 - USART6_TX */
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{ .stream = 6 }, /* DMA1 Stream 6 - USART2_TX */
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{ .stream = 3 }, /* DMA1 Stream 3 - SPI2_RX */
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{ .stream = 4 }, /* DMA1 Stream 4 - SPI2_TX */
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{ .stream = 11 }, /* DMA2 Stream 3 - SPI4_RX */
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{ .stream = 12 }, /* DMA2 Stream 4 - SPI4_TX */
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{ .stream = 8 }, /* DMA2 Stream 0 - ETH_TX */
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};
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#define DMA_0_ISR isr_dma2_stream7
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#define DMA_1_ISR isr_dma2_stream6
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#define DMA_2_ISR isr_dma1_stream6
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#define DMA_3_ISR isr_dma2_stream2
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#define DMA_4_ISR isr_dma2_stream5
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#define DMA_5_ISR isr_dma2_stream3
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#define DMA_6_ISR isr_dma2_stream4
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#define DMA_7_ISR isr_dma2_stream0
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#define DMA_NUMOF ARRAY_SIZE(dma_config)
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/** @} */
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/**
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* @name UART configuration
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* @{
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*/
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static const uart_conf_t uart_config[] = {
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{
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.dev = USART1,
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.rcc_mask = RCC_APB2ENR_USART1EN,
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.rx_pin = GPIO_PIN(PORT_B, 7),
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.tx_pin = GPIO_PIN(PORT_A, 9),
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.rx_af = GPIO_AF7,
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.tx_af = GPIO_AF7,
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.bus = APB2,
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.irqn = USART1_IRQn,
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#ifdef MODULE_PERIPH_DMA
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.dma = 0,
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.dma_chan = 4
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#endif
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},
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{ /* Arduino connectors */
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.dev = USART6,
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.rcc_mask = RCC_APB2ENR_USART6EN,
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.rx_pin = GPIO_PIN(PORT_C, 6),
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.tx_pin = GPIO_PIN(PORT_C, 7),
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.rx_af = GPIO_AF7,
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.tx_af = GPIO_AF7,
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.bus = APB2,
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.irqn = USART6_IRQn,
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#ifdef MODULE_PERIPH_DMA
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.dma = 1,
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.dma_chan = 5
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#endif
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},
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};
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#define UART_0_ISR (isr_usart1)
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#define UART_0_DMA_ISR (isr_dma2_stream7)
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#define UART_6_ISR (isr_usart6)
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#define UART_6_DMA_ISR (isr_dma2_stream6)
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#define UART_NUMOF ARRAY_SIZE(uart_config)
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/** @} */
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/**
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* @name SPI configuration
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* @{
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*/
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static const spi_conf_t spi_config[] = {
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{
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.dev = SPI2,
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.mosi_pin = GPIO_PIN(PORT_B, 15),
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.miso_pin = GPIO_PIN(PORT_B, 14),
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.sclk_pin = GPIO_PIN(PORT_I, 1),
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.cs_pin = GPIO_UNDEF,
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.mosi_af = GPIO_AF5,
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.miso_af = GPIO_AF5,
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.sclk_af = GPIO_AF5,
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.cs_af = GPIO_AF5,
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.rccmask = RCC_APB1ENR_SPI2EN,
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.apbbus = APB1,
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#ifdef MODULE_PERIPH_DMA
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.tx_dma = 4,
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.tx_dma_chan = 0,
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.rx_dma = 3,
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.rx_dma_chan = 0,
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#endif
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},
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};
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#define SPI_NUMOF ARRAY_SIZE(spi_config)
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/** @} */
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/**
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* @name ETH configuration
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* @{
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*/
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static const eth_conf_t eth_config = {
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.mode = RMII,
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.speed = MII_BMCR_SPEED_100 | MII_BMCR_FULL_DPLX,
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.dma = 7,
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.dma_chan = 8,
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.phy_addr = 0x00,
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.pins = {
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GPIO_PIN(PORT_G, 13), /* TXD0 */
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GPIO_PIN(PORT_G, 14), /* TXD1 */
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GPIO_PIN(PORT_G, 11), /* TX_EN */
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GPIO_PIN(PORT_C, 4), /* RXD0 */
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GPIO_PIN(PORT_C, 5), /* RXD1 */
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GPIO_PIN(PORT_A, 7), /* CRS_DV */
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GPIO_PIN(PORT_C, 1), /* MDC */
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GPIO_PIN(PORT_A, 2), /* MDIO */
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GPIO_PIN(PORT_A, 1), /* REF_CLK */
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}
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};
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#define ETH_DMA_ISR isr_dma2_stream0
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CONF_H */
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/** @} */
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