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7d1d5e77d8
New CPU FE310 from SiFive based on RISC-V architecture build: add makefile for RISC-V builds Makefile for builds using RISC-V tools
34 lines
516 B
C
34 lines
516 B
C
/*
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* Copyright 2017 Ken Rabold
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_fe310
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* @{
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*
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* @file pm.c
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* @brief Implementation of the CPU power management for SiFive FE310
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*
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* @author Ken Rabold
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* @}
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*/
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#include "periph/pm.h"
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void pm_set_lowest(void)
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{
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/* __asm__("wfi"); */
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}
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void pm_off(void)
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{
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}
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void pm_reboot(void)
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{
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}
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