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64 lines
1.3 KiB
C
64 lines
1.3 KiB
C
/*
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* Copyright (C) 2019 Inria
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup boards_common_stm32
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* @{
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*
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* @file
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* @brief Common configuration for STM32 Timer peripheral based on TIM2
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*
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* @author Alexandre Abadie <alexandre.abadie@inria.fr>
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*/
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#ifndef CFG_TIMER_TIM2_H
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#define CFG_TIMER_TIM2_H
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#include "periph_cpu.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name Timer configuration
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* @{
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*/
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static const timer_conf_t timer_config[] = {
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{
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.dev = TIM2,
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#if defined(CPU_FAM_STM32L0) || defined(CPU_FAM_STM32L1)
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.max = 0x0000ffff,
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#else
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.max = 0xffffffff,
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#endif
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#if defined(CPU_FAM_STM32L4) || defined(CPU_FAM_STM32WB) || \
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defined(CPU_FAM_STM32WL) || defined(CPU_FAM_STM32G4)
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.rcc_mask = RCC_APB1ENR1_TIM2EN,
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#elif CPU_FAM_STM32MP1
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.rcc_mask = RCC_MC_APB1ENSETR_TIM2EN,
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#else
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.rcc_mask = RCC_APB1ENR_TIM2EN,
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#endif
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.bus = APB1,
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.irqn = TIM2_IRQn
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}
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};
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#define TIMER_0_ISR isr_tim2
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#define TIMER_NUMOF ARRAY_SIZE(timer_config)
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* CFG_TIMER_TIM2_H */
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/** @} */
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