mirror of
https://github.com/RIOT-OS/RIOT.git
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131 lines
4.3 KiB
C
131 lines
4.3 KiB
C
/*
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* Copyright (C) 2018 Gunar Schorcht
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_esp8266
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* @{
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*
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* @file
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* @brief ESP8266 exception handling
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*
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* @author Gunar Schorcht <gunar@schorcht.net>
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* @}
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*/
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#define ENABLE_DEBUG 0
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#include "debug.h"
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#include <string.h>
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#include <stdlib.h>
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#include "common.h"
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#include "log.h"
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#include "periph/pm.h"
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#include "ps.h"
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#include "esp/common_macros.h"
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#include "esp/xtensa_ops.h"
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#include "sdk/ets.h"
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#include "tools.h"
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#include "xtensa/corebits.h"
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#include "xtensa/xtensa_api.h"
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static const char* exception_names [] =
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{
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"IllegalInstructionCause", /* 0 */
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"SyscallCause", /* 1 */
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"InstructionFetchErrorCause", /* 2 */
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"LoadStoreErrorCause", /* 3 */
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"Level1InterruptCause", /* 4 */
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"AllocaCause", /* 5 */
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"IntegerDivideByZeroCause", /* 6 */
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"", /* 7 - reserved */
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"PrivilegedCause", /* 8 */
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"LoadStoreAlignmentCause", /* 9 */
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"", /* 10 - reserved */
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"", /* 11 - reserved */
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"InstrPIFDataErrorCause", /* 12 */
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"LoadStorePIFDataErrorCause", /* 13 */
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"InstrPIFAddrErrorCause", /* 14 */
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"LoadStorePIFAddrErrorCause", /* 15 */
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"InstTLBMissCause", /* 16 */
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"InstTLBMultiHitCause", /* 17 */
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"InstFetchPrivilegeCause", /* 18 */
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"", /* 19 - reserved */
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"InstFetchProhibitedCause", /* 20 */
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"", /* 21 - reserved */
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"", /* 22 - reserved */
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"", /* 23 - reserved */
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"LoadStoreTLBMissCause", /* 24 */
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"LoadStoreTLBMultiHitCause", /* 25 */
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"LoadStorePrivilegeCause", /* 26 */
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"", /* 27 - reserved */
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"LoadProhibitedCause", /* 28 */
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"StoreProhibitedCause", /* 29 */
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"", /* 30 - reserved */
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"", /* 31 - reserved */
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"Coprocessor0Disabled", /* 32 */
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"Coprocessor1Disabled", /* 33 */
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"Coprocessor2Disabled", /* 34 */
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"Coprocessor3Disabled", /* 35 */
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"Coprocessor4Disabled", /* 36 */
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"Coprocessor5Disabled", /* 37 */
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"Coprocessor6Disabled", /* 38 */
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"Coprocessor7Disabled", /* 39 */
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};
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void IRAM NORETURN exception_handler (XtExcFrame *frame)
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{
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uint32_t excsave1;
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RSR(excsave1, excsave1);
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ets_printf("EXCEPTION!! exccause=%d (%s) @%08lx excvaddr=%08lx\n",
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frame->exccause, exception_names[frame->exccause],
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excsave1, frame->excvaddr);
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#if defined(DEVELHELP)
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#if defined(MODULE_PS)
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ps();
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#endif
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print_meminfo();
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#endif
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/* flushing the buffer */
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ets_printf(" \n");
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ets_printf(" \n");
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ets_printf(" \n");
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/* hard reset */
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__asm__ volatile (" call0 0x40000080 ");
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UNREACHABLE();
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}
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void init_exceptions (void)
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{
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xt_set_exception_handler(EXCCAUSE_UNALIGNED, exception_handler);
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xt_set_exception_handler(EXCCAUSE_ILLEGAL, exception_handler);
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xt_set_exception_handler(EXCCAUSE_INSTR_ERROR, exception_handler);
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xt_set_exception_handler(EXCCAUSE_LOAD_STORE_ERROR, exception_handler);
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xt_set_exception_handler(EXCCAUSE_LOAD_PROHIBITED, exception_handler);
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xt_set_exception_handler(EXCCAUSE_STORE_PROHIBITED, exception_handler);
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xt_set_exception_handler(EXCCAUSE_PRIVILEGED, exception_handler);
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}
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void IRAM NORETURN panic_arch(void)
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{
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#if defined(DEVELHELP)
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print_meminfo();
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ets_printf(" \n");
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ets_printf(" \n");
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#endif
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/* hard reset */
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__asm__ volatile (" call0 0x40000080 ");
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UNREACHABLE();
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}
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