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73 lines
1.7 KiB
C
73 lines
1.7 KiB
C
/*
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* Copyright (C) 2016 Leon George
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_cc26x0_definitions
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* @{
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*
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* @file
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* @brief CC26x0 MCU I/O register definitions
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*
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* @author Leon George <leon@georgemail.eu>
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*/
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#ifndef CC26X0_I2C_H
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#define CC26X0_I2C_H
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#include "cc26x0.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* I2C registers
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*/
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typedef struct {
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reg32_t SOAR; /**< slave own address */
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union {
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reg32_t SSTAT; /**< slave status */
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reg32_t SCTL; /**< slave control */
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};
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reg32_t SDR; /**< slave data */
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reg32_t SIMR; /**< slave interrupt mask */
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reg32_t SRIS; /**< slave raw interrupt status */
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reg32_t SMIS; /**< slave masked interrupt status */
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reg32_t SICR; /**< slave interrupt clear */
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reg32_t __reserved[0x1F9]; /**< meh */
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reg32_t MSA; /**< master slave address */
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union {
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reg32_t MSTAT; /**< master status */
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reg32_t MCTRL; /**< master control */
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};
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reg32_t MDR; /**< master data */
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reg32_t MTPR; /**< master timer period */
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reg32_t MIMR; /**< master interrupt mask */
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reg32_t MRIS; /**< master raw interrupt status */
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reg32_t MMIS; /**< master masked interrupt statues */
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reg32_t MICR; /**< master interrupt clear */
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reg32_t MCR; /**< master configuration */
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} i2c_regs_t;
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/** @ingroup cpu_specific_peripheral_memory_map
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* @{
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*/
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#define I2C_BASE (PERIPH_BASE + 0x2000) /**< I2C base address */
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/** @} */
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#define I2C ((i2c_regs_t *) (I2C_BASE)) /**< I2C register bank */
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#ifdef __cplusplus
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}
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#endif
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#endif /* CC26X0_I2C_H */
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/*@}*/
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