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3c906c6c3d
Signed-off-by: Josua Arndt <josuaarndt@live.de> Signed-off-by: Steffen Robertz <steffen.robertz@online.de>
138 lines
4.1 KiB
C
138 lines
4.1 KiB
C
/*
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* Copyright (C) 2017 RWTH Aachen, Josua Arndt
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_atmega256rfr2
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* @{
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*
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* @file
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* @brief Implementation of the CPU initialization
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*
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* @author Steffen Robertz <steffen.robertz@rwth-aachen.de>
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* @author Josua Arndt <jarndt@ias.rwth-aachen.de>
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* @}
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*/
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#include <avr/io.h>
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#include <avr/wdt.h>
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#include <avr/pgmspace.h>
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#include "cpu.h"
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#include "board.h"
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#include "periph/init.h"
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#define ENABLE_DEBUG (0)
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#include "debug.h"
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/*
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* Since this MCU does not feature a software reset, the watchdog timer
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* is being used. It will be set to the shortest time and then force a
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* reset. Therefore the MCUSR register needs to be resetted as fast as
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* possible. In this case in the bootloader already. In order to regain
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* information about the reset cause, the MCUSR is copied to r2 beforehand.
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* When a software reset was triggered, r3 will contain 0xAA. In order to
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* prevent changes to the values from the .init section, r2 and r3 are saved
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* in the .init0 section
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*/
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uint8_t mcusr_mirror __attribute__((section(".noinit")));
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uint8_t soft_rst __attribute__((section(".noinit")));
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void get_mcusr(void) __attribute__((naked)) __attribute__((section(".init0")));
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void get_mcusr(void)
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{
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/* save the reset flags passed from the bootloader */
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__asm__ __volatile__("mov %0, r2\n" : "=r" (mcusr_mirror) :);
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__asm__ __volatile__("mov %0, r3\n" : "=r" (soft_rst) :);
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}
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void _reset_cause(void)
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{
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if (mcusr_mirror & (1 << PORF)) {
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DEBUG("Power-on reset.\n");
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}
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if (mcusr_mirror & (1 << EXTRF)) {
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DEBUG("External reset!\n");
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}
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if (mcusr_mirror & (1 << BORF)) {
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DEBUG("Brownout reset!\n");
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}
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if (mcusr_mirror & (1 << WDRF)) {
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if (soft_rst & 0xAA) {
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DEBUG("Software reset!\n");
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} else {
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DEBUG("Watchdog reset!\n");
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}
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}
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if (mcusr_mirror & (1 << JTRF)) {
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DEBUG("JTAG reset!\n");
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}
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}
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void cpu_init(void)
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{
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_reset_cause();
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wdt_reset(); /* should not be nececessary as done in bootloader */
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wdt_disable(); /* but when used without bootloader this is needed */
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/* Set system clock Prescaler */
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CLKPR = (1 << CLKPCE); /* enable a change to CLKPR */
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/* set the Division factor to 1 results in divisor 2 for internal Oscillator
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* So FCPU = 8MHz
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*
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* Attention!
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* The CPU can not be used with the external xtal oscillator if the core
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* should be put in sleep while the transceiver is in rx mode.
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*
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* It seems the as teh peripheral clock divider is set to 1 and this all
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* clocks of the timer, etc run with 16MHz increasing power consumption.
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* */
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CLKPR = 0;
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/* Initialize peripherals for which modules are included in the makefile.*/
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/* spi_init */
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/* rtc_init */
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/* hwrng_init */
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periph_init();
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}
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/* This is a vector which is aliased to __vector_default,
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* the vector executed when an ISR fires with no accompanying
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* ISR handler. This may be used along with the ISR() macro to
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* create a catch-all for undefined but used ISRs for debugging
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* purposes.
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* SCIRQS – Symbol Counter Interrupt Status Register
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* BATMON – Battery Monitor Control and Status Register
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* IRQ_STATUS /1 – Transceiver Interrupt Status Register
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* EIFR – External Interrupt Flag Register
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* PCIFR – Pin Change Interrupt Flag Register
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*/
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ISR(BADISR_vect){
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_reset_cause();
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printf_P(PSTR("FATAL ERROR: BADISR_vect called, unprocessed Interrupt.\n"
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"STOP Execution.\n"));
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printf("IRQ_STATUS %#02x\nIRQ_STATUS1 %#02x\n",
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(unsigned int)IRQ_STATUS, (unsigned int)IRQ_STATUS1 );
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printf("SCIRQS %#02x\nBATMON %#02x\n", (unsigned int)SCIRQS, (unsigned int)BATMON );
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printf("EIFR %#02x\nPCIFR %#02x\n", (unsigned int)EIFR, (unsigned int)PCIFR );
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/* White LED light is used to signal ERROR. */
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LED_PORT |= (LED2_MASK | LED1_MASK | LED0_MASK);
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while (1) {}
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}
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ISR(BAT_LOW_vect, ISR_BLOCK){
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__enter_isr();
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DEBUG("BAT_LOW \n");
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__exit_isr();
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}
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