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https://github.com/RIOT-OS/RIOT.git
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52107b2416
The esp8266 CPU has actually two hardware UART peripherals. UART0 is
used by the boot ROM for flashing and serial output during boot,
typically at a baudrate of 74880 bps until the bootloader or application
sets the more standard 115200 baudrate. This UART0 device has two
possible pins for TXD, GPIO1 and GPIO2, which are both set to TXD by the
boot ROM. esp8266 modules will typically have GPIO1 labeled as the TX
pin, but it is possible to use GPIO2 for that purpose even while
flashing the device with esptool.py.
The second device, UART1, also has two options for TXD, GPIO2 and GPIO7,
and only one option for RXD, GPIO8. However, GPIO7 and GPIO8 are used
by the flash internally so those options are not very useful unless
maybe while running from IRAM with the flash disabled, for example for
a debugger over UART1.
This patch allows boards to override UART{0,1}_{R,T}XD in their
periph_conf.h to configure the uart selection. Defining UART1_TX will
make the UART_DEV(1) device available.
Tested with:
```CFLAGS='-DUART1_TXD=GPIO2' make -C tests/periph_uart BOARD=esp8266-esp-12x flash term```
* Connected one USB-UART to the standard GPIO1 and GPIO3 for flashing
and console. After flashing we see the manual test output at 115200
bps
* Connected a second USB-UART with RX to GPIO2 running at 74880.
Then run on the first console:
```
> init 1 74880
> send 1 hello
```
The word "hello" appears on the second UART connection.
Note that GPIO2 is used during boot for UART0's TX until the application
or bootloader set it to a regular GPIO, so some boot ROM messages at
74880 bps are visible. After running `init 1 74880` it is set to UART1's
TX.
313 lines
8.6 KiB
C
313 lines
8.6 KiB
C
/*
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* Copyright (C) 2019 Gunar Schorcht
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_esp8266
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* @ingroup drivers_periph_gpio
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* @{
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*
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* @file
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* @brief Low-level GPIO driver implementation for ESP8266
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*
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* @author Gunar Schorcht <gunar@schorcht.net>
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* @}
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*/
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#include <stdbool.h>
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#include "log.h"
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#include "periph/gpio.h" /* RIOT gpio.h */
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#include "esp8266/eagle_soc.h"
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#include "esp8266/gpio_register.h"
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#include "rom/ets_sys.h"
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#include "sdk/ets.h"
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#include "esp/gpio_regs.h"
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#include "esp/iomux_regs.h"
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#include "esp/rtc_regs.h"
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#include "esp_common.h"
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#include "gpio_arch.h"
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#include "irq_arch.h"
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#include "syscalls.h"
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#define ENABLE_DEBUG 0
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#include "debug.h"
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/*
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* IOMUX to GPIO mapping
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* source https://www.espressif.com/sites/default/files/documentation/0d-esp8266_pin_list_release_15-11-2014.xlsx
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*/
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const uint8_t _gpio_to_iomux[] = { 12, 5, 13, 4, 14, 15, 6, 7, 8, 9, 10, 11, 0, 1, 2, 3 };
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const uint8_t _iomux_to_gpio[] = { 12, 13, 14, 15, 3, 1, 6, 7, 8, 9, 10, 11, 0, 2, 4, 5 };
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gpio_pin_usage_t _gpio_pin_usage [GPIO_PIN_NUMOF] =
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{
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_GPIO, /* gpio0 */
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/* UART0 is initialized by the boot ROM, this only reflects our selection so
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* other devices don't step on it. */
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UART0_TXD == GPIO1 ? _UART : _GPIO, /* gpio1 */
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UART0_TXD == GPIO2 ? _UART : _GPIO, /* gpio2 */
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UART0_RXD == GPIO3 ? _UART : _GPIO, /* gpio3 */
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_GPIO, /* gpio4 */
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_GPIO, /* gpio5 */
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_SPIF, /* gpio6 SPI flash CLK */
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_SPIF, /* gpio7 SPI flash MISO */
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_SPIF, /* gpio8 SPI flash MOSI */
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#if defined(FLASH_MODE_QIO) || defined(FLASH_MODE_QOUT)
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_SPIF, /* gpio9 SPI flash HD (qio/qout flash mode) */
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_SPIF, /* gpio10 SPI flash WP (qio/qout flash mode) */
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#else
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_GPIO, /* gpio9 can be used as GPIO if not needed for flash */
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_GPIO, /* gpio10 can be used as GPIO if not needed for flash */
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#endif
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_SPIF, /* gpio11 SPI flash CS */
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_GPIO, /* gpio12 */
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_GPIO, /* gpio13 */
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_GPIO, /* gpio14 */
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_GPIO, /* gpio15 */
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_GPIO /* gpio16 */
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};
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/* String representation of usage types */
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const char* _gpio_pin_usage_str[] =
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{
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"GPIO", "I2C", "PWM", "SPI", "SPI Flash", "UART", "N/A"
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};
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int gpio_init(gpio_t pin, gpio_mode_t mode)
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{
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DEBUG("%s: %d %d\n", __func__, pin, mode);
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CHECK_PARAM_RET(pin < GPIO_PIN_NUMOF, -1);
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/* check whether pin can be used as GPIO or is used in anyway else */
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switch (_gpio_pin_usage[pin]) {
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case _I2C: LOG_ERROR("GPIO%d is used as I2C signal.\n", pin); return -1;
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case _PWM: LOG_ERROR("GPIO%d is used as PWM output.\n", pin); return -1;
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case _SPI: LOG_ERROR("GPIO%d is used as SPI interface.\n", pin); return -1;
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case _SPIF: LOG_ERROR("GPIO%d is used as SPI flash.\n", pin); return -1;
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case _UART: LOG_ERROR("GPIO%d is used as UART interface.\n", pin); return -1;
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default: break;
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}
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/* GPIO16 requires separate handling */
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if (pin == GPIO16) {
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RTC.GPIO_CFG[3] = (RTC.GPIO_CFG[3] & 0xffffffbc) | BIT(0);
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RTC.GPIO_CONF = RTC.GPIO_CONF & ~RTC_GPIO_CONF_OUT_ENABLE;
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switch (mode) {
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case GPIO_OUT:
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RTC.GPIO_ENABLE = RTC.GPIO_OUT | RTC_GPIO_CONF_OUT_ENABLE;
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break;
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case GPIO_OD:
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LOG_ERROR("GPIO mode GPIO_OD is not supported for GPIO16.\n");
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return -1;
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case GPIO_OD_PU:
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LOG_ERROR("GPIO mode GPIO_OD_PU is not supported for GPIO16.\n");
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return -1;
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case GPIO_IN:
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RTC.GPIO_ENABLE = RTC.GPIO_OUT & ~RTC_GPIO_CONF_OUT_ENABLE;
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RTC.GPIO_CFG[3] &= ~RTC_GPIO_CFG3_PIN_PULLUP;
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break;
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case GPIO_IN_PU:
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LOG_ERROR("GPIO mode GPIO_IN_PU is not supported for GPIO16.\n");
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return -1;
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case GPIO_IN_PD:
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LOG_ERROR("GPIO mode GPIO_IN_PD is not supported for GPIO16.\n");
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return -1;
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default:
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LOG_ERROR("Invalid GPIO mode for GPIO%d.\n", pin);
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return -1;
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}
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return 0;
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}
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uint8_t iomux = _gpio_to_iomux [pin];
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uint32_t iomux_conf = (iomux > 11) ? IOMUX_FUNC(0) : IOMUX_FUNC(3);
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switch (mode) {
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case GPIO_OUT: iomux_conf |= IOMUX_PIN_OUTPUT_ENABLE;
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iomux_conf |= IOMUX_PIN_OUTPUT_ENABLE_SLEEP;
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GPIO.CONF[pin] &= ~GPIO_CONF_OPEN_DRAIN;
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GPIO.ENABLE_OUT_SET = BIT(pin);
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break;
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case GPIO_OD_PU: iomux_conf |= IOMUX_PIN_PULLUP;
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iomux_conf |= IOMUX_PIN_PULLUP_SLEEP;
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case GPIO_OD: iomux_conf |= IOMUX_PIN_OUTPUT_ENABLE;
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iomux_conf |= IOMUX_PIN_OUTPUT_ENABLE_SLEEP;
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GPIO.CONF[pin] |= GPIO_CONF_OPEN_DRAIN;
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GPIO.ENABLE_OUT_SET = BIT(pin);
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break;
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case GPIO_IN_PU: iomux_conf |= IOMUX_PIN_PULLUP;
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iomux_conf |= IOMUX_PIN_PULLUP_SLEEP;
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case GPIO_IN: GPIO.CONF[pin] |= GPIO_CONF_OPEN_DRAIN;
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GPIO.ENABLE_OUT_CLEAR = BIT(pin);
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break;
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case GPIO_IN_PD: LOG_ERROR("GPIO mode GPIO_IN_PD is not supported.\n");
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return -1;
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default: LOG_ERROR("Invalid GPIO mode for GPIO%d.\n", pin);
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}
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IOMUX.PIN[iomux] = iomux_conf;
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return 0;
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}
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#ifdef MODULE_PERIPH_GPIO_IRQ
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static gpio_isr_ctx_t gpio_isr_ctx_table [GPIO_PIN_NUMOF] = { };
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static bool gpio_int_enabled_table [GPIO_PIN_NUMOF] = { };
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void IRAM gpio_int_handler (void* arg)
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{
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irq_isr_enter();
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for (int i = 0; i < GPIO_PIN_NUMOF; i++) {
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uint32_t mask = BIT(i);
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if (GPIO.STATUS & mask) {
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GPIO.STATUS_CLEAR = mask;
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if (gpio_int_enabled_table[i] && (GPIO.CONF[i] & GPIO_PIN_INT_TYPE_MASK)) {
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gpio_isr_ctx_table[i].cb (gpio_isr_ctx_table[i].arg);
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}
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}
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mask = mask << 1;
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}
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irq_isr_exit();
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}
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int gpio_init_int(gpio_t pin, gpio_mode_t mode, gpio_flank_t flank,
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gpio_cb_t cb, void *arg)
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{
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if (gpio_init(pin, mode)) {
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return -1;
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}
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if (pin == GPIO16) {
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/* GPIO16 requires separate handling */
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LOG_ERROR("GPIO16 cannot generate interrupts.\n");
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return -1;
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}
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gpio_isr_ctx_table[pin].cb = cb;
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gpio_isr_ctx_table[pin].arg = arg;
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GPIO.CONF[pin] = SET_FIELD(GPIO.CONF[pin], GPIO_CONF_INTTYPE, flank);
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if (flank != GPIO_NONE) {
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gpio_int_enabled_table [pin] = (gpio_isr_ctx_table[pin].cb != NULL);
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ets_isr_attach (ETS_GPIO_INUM, gpio_int_handler, 0);
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ets_isr_unmask ((1 << ETS_GPIO_INUM));
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}
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return 0;
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}
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void gpio_irq_enable (gpio_t pin)
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{
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CHECK_PARAM(pin < GPIO_PIN_NUMOF);
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gpio_int_enabled_table [pin] = true;
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}
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void gpio_irq_disable (gpio_t pin)
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{
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CHECK_PARAM(pin < GPIO_PIN_NUMOF);
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gpio_int_enabled_table [pin] = false;
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}
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#endif /* MODULE_PERIPH_GPIO_IRQ */
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int gpio_read (gpio_t pin)
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{
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CHECK_PARAM_RET(pin < GPIO_PIN_NUMOF, -1);
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if (pin == GPIO16) {
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/* GPIO16 requires separate handling */
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return RTC.GPIO_IN & BIT(0);
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}
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return (GPIO.IN & BIT(pin)) ? 1 : 0;
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}
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void gpio_write (gpio_t pin, int value)
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{
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DEBUG("%s: %d %d\n", __func__, pin, value);
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CHECK_PARAM(pin < GPIO_PIN_NUMOF);
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if (pin == GPIO16) {
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/* GPIO16 requires separate handling */
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RTC.GPIO_OUT = (RTC.GPIO_OUT & ~BIT(0)) | (value ? 1 : 0);
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return;
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}
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if (value) {
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GPIO.OUT_SET = BIT(pin) & GPIO_OUT_PIN_MASK;
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}
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else {
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GPIO.OUT_CLEAR = BIT(pin) & GPIO_OUT_PIN_MASK;
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}
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}
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void gpio_set (gpio_t pin)
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{
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gpio_write (pin, 1);
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}
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void gpio_clear (gpio_t pin)
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{
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gpio_write (pin, 0);
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}
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void gpio_toggle (gpio_t pin)
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{
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DEBUG("%s: %d\n", __func__, pin);
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CHECK_PARAM(pin < GPIO_PIN_NUMOF);
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if (pin == GPIO16) {
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/* GPIO16 requires separate handling */
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RTC.GPIO_OUT = (RTC.GPIO_OUT & ~BIT(0)) | ((RTC.GPIO_IN & BIT(0)) ? 0 : 1);
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return;
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}
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GPIO.OUT ^= BIT(pin);
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}
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int gpio_set_pin_usage(gpio_t pin, gpio_pin_usage_t usage)
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{
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CHECK_PARAM_RET(pin < GPIO_PIN_NUMOF, -1);
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_gpio_pin_usage [pin] = usage;
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return 0;
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}
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gpio_pin_usage_t gpio_get_pin_usage (gpio_t pin)
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{
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return (pin < GPIO_PIN_NUMOF) ? _gpio_pin_usage[pin] : _NOT_EXIST;
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}
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const char* gpio_get_pin_usage_str(gpio_t pin)
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{
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return _gpio_pin_usage_str[_gpio_pin_usage[((pin < GPIO_PIN_NUMOF) ? pin : _NOT_EXIST)]];
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}
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