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228 lines
10 KiB
C
228 lines
10 KiB
C
/*
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** ###################################################################
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** Compilers: Keil ARM C/C++ Compiler
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** Freescale C/C++ for Embedded ARM
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** GNU C Compiler
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** GNU C Compiler - CodeSourcery Sourcery G++
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** IAR ANSI C/C++ Compiler for ARM
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**
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** Reference manual: KEA128RM, Rev. 22, Jun 2014
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** Version: rev. 1.4, 2015-07-24
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** Build: b150730
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**
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** Abstract:
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** Provides a system configuration function and a global variable that
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** contains the system frequency. It configures the device and initializes
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** the oscillator (PLL) that is part of the microcontroller device.
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**
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** Copyright (c) 2015 Freescale Semiconductor, Inc.
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** All rights reserved.
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**
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** Redistribution and use in source and binary forms, with or without modification,
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** are permitted provided that the following conditions are met:
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**
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** o Redistributions of source code must retain the above copyright notice, this list
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** of conditions and the following disclaimer.
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**
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** o Redistributions in binary form must reproduce the above copyright notice, this
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** list of conditions and the following disclaimer in the documentation and/or
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** other materials provided with the distribution.
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**
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** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
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** contributors may be used to endorse or promote products derived from this
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** software without specific prior written permission.
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**
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** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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**
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** http: www.freescale.com
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** mail: support@freescale.com
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**
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** Revisions:
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** - rev. 1.0 (2013-07-30)
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** Initial version.
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** - rev. 1.1 (2013-10-29)
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** Definition of BITBAND macros updated to support peripherals with 32-bit acces disabled.
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** - rev. 1.2 (2014-01-10)
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** CAN - Corrected address of TSIDR1 register.
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** CAN - Corrected name of MSCAN_TDLR bit DLC to TDLC.
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** FTM0 - Added access macro for EXTTRIG register.
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** NVIC - Registers access macros improved.
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** SCB - Unused bits removed, mask, shift macros improved.
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** Defines of interrupt vectors aligned to RM.
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** - rev. 1.3 (2014-06-18)
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** The declaration of clock configurations has been moved to separate header file system_MKE02Z2.h
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** Module access macro {module}_BASES replaced by {module}_BASE_PTRS.
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** I2C - Renamed status register S to S1 to match RM naming.
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** Renamed interrupts: INT_PMC to INT_LVD_LVW, INT_ADC to ADC0,INT_WDOG to INT_Watchdog.
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** - rev. 1.4 (2015-07-24)
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** Correction of backward compatibility.
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**
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** ###################################################################
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*/
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/*!
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* @file SKEAZ1284
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* @version 1.4
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* @date 2015-07-24
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* @brief Device specific configuration file for SKEAZ1284 (header file)
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*
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* Provides a system configuration function and a global variable that contains
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* the system frequency. It configures the device and initializes the oscillator
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* (PLL) that is part of the microcontroller device.
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*/
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#ifndef SYSTEM_SKEAZ1284_H_
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#define SYSTEM_SKEAZ1284_H_ /**< Symbol preventing repeated inclusion */
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <stdint.h>
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#ifndef DISABLE_WDOG
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#define DISABLE_WDOG 1
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#endif
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#ifndef CLOCK_SETUP
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#define CLOCK_SETUP 0
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#endif
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/* ICS mode constants */
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#define ICS_MODE_FEI 0U
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#define ICS_MODE_FEE 1U
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#define ICS_MODE_FBI 2U
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#define ICS_MODE_FBE 3U
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#define ICS_MODE_BLPI 4U
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#define ICS_MODE_BLPE 5U
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/* Predefined clock setups
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0 ... Internal Clock Source (ICS) in FLL Engaged Internal (FEI) mode
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Multipurpose Clock Generator (ICS) in FEI mode.
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Reference clock source for ICS module: FLL clock (internal reference)
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Core clock = 24MHz
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Bus clock = 24MHz
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1 ... Internal Clock Source (ICS) in FLL Engaged External (FEE) mode
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Multipurpose Clock Generator (ICS) in FEE mode.
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Reference clock source for ICS module: FLL clock (external reference)
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Core clock = 40MHz
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Bus clock = 20MHz
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2 ... Internal Clock Source (ICS) in Bypassed Low Power Internal (BLPI) mode
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Multipurpose Clock Generator (ICS) in BLPI mode.
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Reference clock source for ICS module: Internal clock
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Core clock = 0.0375MHz
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Bus clock = 0.0375MHz
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3 ... Internal Clock Source (ICS) in Bypassed Low Power External (BLPE) mode
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Multipurpose Clock Generator (ICS) in BLPE mode.
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Reference clock source for ICS module: External clock
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Core clock = 8MHz
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Bus clock = 8MHz
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*/
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/* Define clock source values */
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#define CPU_XTAL_CLK_HZ 8000000u /* Value of the external crystal or oscillator clock frequency in Hz */
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#define CPU_INT_CLK_HZ 37500u /* Value of the slow internal oscillator clock frequency in Hz */
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#if (CLOCK_SETUP == 0)
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#define DEFAULT_SYSTEM_CLOCK 24000000u /* Default System clock value */
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#define ICS_MODE ICS_MODE_FEI /* Clock generator mode */
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/* ICS_C1: CLKS=0,RDIV=0,IREFS=1,IRCLKEN=0,IREFSTEN=0 */
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#define ICS_C1_VALUE 0x04U /* ICS_C1 */
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/* ICS_C2: BDIV=1,LP=0 */
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#define ICS_C2_VALUE 0x20U /* ICS_C2 */
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/* ICS_C4: LOLIE=0,CME=0,SCFTRIM=0 */
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#define ICS_C4_VALUE 0x00U /* ICS_C4 */
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/* OSC_CR: OSCEN=0,OSCSTEN=0,OSCOS=0,RANGE=0,HGO=0,OSCINIT=0 */
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#define OSC_CR_VALUE 0x00U /* OSC_CR */
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/* SIM_CLKDIV: OUTDIV1=0,OUTDIV2=0,OUTDIV3=0 */
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#define SIM_CLKDIV_VALUE 0x00U /* SIM_CLKDIV */
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#elif (CLOCK_SETUP == 1)
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#define DEFAULT_SYSTEM_CLOCK 40000000u /* Default System clock value */
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#define ICS_MODE ICS_MODE_FEE /* Clock generator mode */
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/* ICS_C1: CLKS=0,RDIV=3,IREFS=0,IRCLKEN=0,IREFSTEN=0 */
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#define ICS_C1_VALUE 0x18U /* ICS_C1 */
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/* ICS_C2: BDIV=0,LP=0 */
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#define ICS_C2_VALUE 0x00U /* ICS_C2 */
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/* ICS_C4: LOLIE=0,CME=0,SCFTRIM=0 */
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#define ICS_C4_VALUE 0x00U /* ICS_C4 */
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/* OSC_CR: OSCEN=1,OSCSTEN=0,OSCOS=1,RANGE=1,HGO=0,OSCINIT=0 */
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#define OSC_CR_VALUE 0x94U /* OSC_CR */
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/* SIM_CLKDIV: OUTDIV1=0,OUTDIV2=1,OUTDIV3=0 */
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#define SIM_CLKDIV_VALUE 0x1000000U /* SIM_CLKDIV */
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#elif (CLOCK_SETUP == 2)
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#define DEFAULT_SYSTEM_CLOCK 37500u /* Default System clock value */
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#define ICS_MODE ICS_MODE_BLPI /* Clock generator mode */
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/* ICS_C1: CLKS=1,RDIV=0,IREFS=1,IRCLKEN=1,IREFSTEN=0 */
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#define ICS_C1_VALUE 0x46U /* ICS_C1 */
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/* ICS_C2: BDIV=0,LP=1 */
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#define ICS_C2_VALUE 0x10U /* ICS_C2 */
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/* ICS_C4: LOLIE=0,CME=0,SCFTRIM=0 */
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#define ICS_C4_VALUE 0x00U /* ICS_C4 */
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/* OSC_CR: OSCEN=0,OSCSTEN=0,OSCOS=0,RANGE=0,HGO=0,OSCINIT=0 */
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#define OSC_CR_VALUE 0x00U /* OSC_CR */
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/* SIM_CLKDIV: OUTDIV1=0,OUTDIV2=0,OUTDIV3=0 */
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#define SIM_CLKDIV_VALUE 0x00U /* SIM_CLKDIV */
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#elif (CLOCK_SETUP == 3)
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#define DEFAULT_SYSTEM_CLOCK 8000000u /* Default System clock value */
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#define ICS_MODE ICS_MODE_BLPE /* Clock generator mode */
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/* ICS_C1: CLKS=2,RDIV=3,IREFS=0,IRCLKEN=1,IREFSTEN=0 */
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#define ICS_C1_VALUE 0x9AU /* ICS_C1 */
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/* ICS_C2: BDIV=0,LP=1 */
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#define ICS_C2_VALUE 0x10U /* ICS_C2 */
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/* ICS_C4: LOLIE=0,CME=0,SCFTRIM=0 */
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#define ICS_C4_VALUE 0x00U /* ICS_C4 */
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/* OSC_CR: OSCEN=1,OSCSTEN=0,OSCOS=1,RANGE=1,HGO=0,OSCINIT=0 */
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#define OSC_CR_VALUE 0x94U /* OSC_CR */
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/* SIM_CLKDIV: OUTDIV1=0,OUTDIV2=0,OUTDIV3=0 */
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#define SIM_CLKDIV_VALUE 0x00U /* SIM_CLKDIV */
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#endif
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/**
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* @brief System clock frequency (core clock)
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*
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* The system clock frequency supplied to the SysTick timer and the processor
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* core clock. This variable can be used by the user application to setup the
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* SysTick timer or configure other parameters. It may also be used by debugger to
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* query the frequency of the debug timer or configure the trace clock speed
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* SystemCoreClock is initialized with a correct predefined value.
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*/
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extern uint32_t SystemCoreClock;
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/**
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* @brief Setup the microcontroller system.
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*
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* Typically this function configures the oscillator (PLL) that is part of the
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* microcontroller device. For systems with variable clock speed it also updates
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* the variable SystemCoreClock. SystemInit is called from startup_device file.
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*/
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void SystemInit (void);
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/**
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* @brief Updates the SystemCoreClock variable.
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*
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* It must be called whenever the core clock is changed during program
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* execution. SystemCoreClockUpdate() evaluates the clock register settings and calculates
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* the current core clock.
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*/
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void SystemCoreClockUpdate (void);
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#ifdef __cplusplus
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}
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#endif
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#endif /* #if !defined(SYSTEM_SKEAZ1284_H_) */
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