mirror of
https://github.com/RIOT-OS/RIOT.git
synced 2024-12-29 04:50:03 +01:00
Kaspar Schleiser
c122571801
Previously, __restore_context was meddling with the to-be-restored context SR on the stack, not correctly restoring GIE. Now, we let the CPU restore the correct status register as saved in __save_context. Contains some simplification of the context save/restore logic.
175 lines
3.7 KiB
C
175 lines
3.7 KiB
C
/*
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* Copyright (C) 2014, Freie Universitaet Berlin (FUB) & INRIA.
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* All rights reserved.
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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#ifndef CPU_H_
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#define CPU_H_
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/**
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* @defgroup cpu_msp430_common TI MSP430
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* @ingroup cpu
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* @brief Texas Instruments MSP430 specific code
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<h2>First steps</h2>
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\li See the <a href="../manual/index.html">manual</a> for toolchain and ide setup
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* @{
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*/
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#include <stdio.h>
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#include <msp430.h>
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#include "board.h"
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#include "sched.h"
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#include "msp430_types.h"
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#include "cpu_conf.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief Wordsize in bit for MSP430 platforms
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*/
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#define WORDSIZE 16
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/**
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* @brief Macro for defining interrupt service routines
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*/
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#define ISR(a,b) void __attribute__((naked, interrupt (a))) b(void)
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/**
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* @brief Deprecated interrupt control functions for backward compatibility
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* @{
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*/
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#define eINT enableIRQ
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#define dINT disableIRQ
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/** @} */
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/**
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* @brief Globally disable IRQs
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*/
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static inline void __attribute__((always_inline)) __disable_irq(void)
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{
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__asm__ __volatile__("bic %0, r2" : : "i"(GIE));
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/* this NOP is needed to handle a "delay slot" that all MSP430 MCUs
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impose silently after messing with the GIE bit, DO NOT REMOVE IT! */
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__asm__ __volatile__("nop");
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}
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/**
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* @brief Globally enable IRQs
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*/
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static inline void __attribute__((always_inline)) __enable_irq(void)
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{
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__asm__ __volatile__("bis %0, r2" : : "i"(GIE));
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/* this NOP is needed to handle a "delay slot" that all MSP430 MCUs
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impose silently after messing with the GIE bit, DO NOT REMOVE IT! */
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__asm__ __volatile__("nop");
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}
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/**
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* @brief The current ISR state (inside or not)
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*/
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extern volatile int __inISR;
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/**
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* @brief Memory used as stack for the interrupt context
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*/
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extern char __isr_stack[MSP430_ISR_STACK_SIZE];
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/**
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* @brief Save the current thread context from inside an ISR
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*/
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static inline void __attribute__((always_inline)) __save_context(void)
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{
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__asm__("push r15");
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__asm__("push r14");
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__asm__("push r13");
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__asm__("push r12");
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__asm__("push r11");
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__asm__("push r10");
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__asm__("push r9");
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__asm__("push r8");
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__asm__("push r7");
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__asm__("push r6");
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__asm__("push r5");
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__asm__("push r4");
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__asm__("mov.w r1,%0" : "=r"(sched_active_thread->sp));
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}
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/**
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* @brief Restore the thread context from inside an ISR
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*/
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static inline void __attribute__((always_inline)) __restore_context(void)
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{
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__asm__("mov.w %0,r1" : : "m"(sched_active_thread->sp));
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__asm__("pop r4");
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__asm__("pop r5");
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__asm__("pop r6");
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__asm__("pop r7");
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__asm__("pop r8");
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__asm__("pop r9");
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__asm__("pop r10");
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__asm__("pop r11");
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__asm__("pop r12");
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__asm__("pop r13");
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__asm__("pop r14");
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__asm__("pop r15");
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__asm__("reti");
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}
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/**
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* @brief Run this code on entering interrupt routines
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*/
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static inline void __attribute__((always_inline)) __enter_isr(void)
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{
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__save_context();
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__asm__("mov.w %0,r1" : : "i"(__isr_stack + MSP430_ISR_STACK_SIZE));
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__inISR = 1;
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}
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/**
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* @brief Run this code on exiting interrupt routines
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*/
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static inline void __attribute__((always_inline)) __exit_isr(void)
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{
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__inISR = 0;
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if (sched_context_switch_request) {
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sched_run();
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}
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__restore_context();
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}
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/**
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* @brief Initialize the cpu
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*/
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void msp430_cpu_init(void);
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/**
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* @brief Print the last instruction's address
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*
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* @todo: Not supported
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*/
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static inline void cpu_print_last_instruction(void)
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{
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puts("n/a");
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}
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#ifdef __cplusplus
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}
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#endif
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/** @} */
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#endif /* CPU_H_ */
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