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https://github.com/RIOT-OS/RIOT.git
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95e3d202f2
NXP calls the family KW2xD in their material. http://www.nxp.com/products/microcontrollers-and-processors/arm-processors/kinetis-cortex-m-mcus/w-series-wireless-m0-plus-m4:KINETIS_W_SERIES
86 lines
2.4 KiB
C
86 lines
2.4 KiB
C
/*
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* Copyright (C) 2014 Freie Universität Berlin
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* Copyright (C) 2014 PHYTEC Messtechnik GmbH
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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* @ingroup cpu_kw2xd
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* @{
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*
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* @file
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* @brief Implementation of the KW2xD CPU initialization
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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* @author Johann Fischer <j.fischer@phytec.de>
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* @}
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*/
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#include <stdint.h>
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#include "cpu.h"
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#include "mcg.h"
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#include "cpu_conf.h"
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#include "periph/init.h"
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#define FLASH_BASE (0x00000000)
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static void cpu_clock_init(void);
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/**
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* @brief Initialize the CPU, set IRQ priorities
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*/
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void cpu_init(void)
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{
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/* initialize the Cortex-M core */
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cortexm_init();
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/* initialize the clock system */
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cpu_clock_init();
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/* trigger static peripheral initialization */
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periph_init();
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}
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static inline void modem_clock_init(void)
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{
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/* Use the CLK_OUT of the modem as the clock source. */
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/* Enable GPIO clock gates */
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KW2XDRF_PORT_CLKEN();
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KW2XDRF_CLK_CTRL_CLKEN();
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/* Modem RST_B is connected to PTB19 and can be used to reset the modem. */
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KW2XDRF_PORT_DEV->PCR[KW2XDRF_RST_PIN] = PORT_PCR_MUX(1);
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BITBAND_REG32(KW2XDRF_GPIO->PDDR, KW2XDRF_RST_PIN) = 1;
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KW2XDRF_GPIO->PCOR = (1 << KW2XDRF_RST_PIN);
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/* Modem GPIO5 is connected to PTC0 and can be used to select CLK_OUT frequency, */
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/* set PTC0 high for CLK_OUT=32.787kHz and low for CLK_OUT=4MHz. */
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KW2XDRF_CLK_CTRL_PORT_DEV->PCR[KW2XDRF_CLK_CTRL_PIN] = PORT_PCR_MUX(1);
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BITBAND_REG32(KW2XDRF_CLK_CTRL_GPIO->PDDR, KW2XDRF_CLK_CTRL_PIN) = 1;
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KW2XDRF_CLK_CTRL_GPIO->PCOR = (1 << KW2XDRF_CLK_CTRL_PIN);
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/* Modem IRQ_B is connected to PTB3, modem interrupt request to the MCU. */
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KW2XDRF_PORT_DEV->PCR[KW2XDRF_IRQ_PIN] = PORT_PCR_MUX(1);
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BITBAND_REG32(KW2XDRF_GPIO->PDDR, KW2XDRF_IRQ_PIN) = 0;
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/* release the reset */
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KW2XDRF_GPIO->PSOR = (1 << KW2XDRF_RST_PIN);
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/* wait for modem IRQ_B interrupt request */
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while (KW2XDRF_GPIO->PDIR & (1 << KW2XDRF_IRQ_PIN));
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}
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/**
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* @brief Configure the controllers clock system
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*/
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static void cpu_clock_init(void)
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{
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/* setup system prescalers */
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SIM->CLKDIV1 = (uint32_t)SIM_CLKDIV1_OUTDIV4(1);
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modem_clock_init();
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kinetis_mcg_set_mode(KINETIS_MCG_PEE);
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}
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