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142 lines
3.6 KiB
Plaintext
142 lines
3.6 KiB
Plaintext
# Copyright (c) 2020 HAW Hamburg
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# 2022 Gunar Schorcht
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#
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# This file is subject to the terms and conditions of the GNU Lesser
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# General Public License v2.1. See the file LICENSE in the top level
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# directory for more details.
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config CPU_CORE_XTENSA_LX6
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bool
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select CPU_ARCH_XTENSA
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config CPU_FAM_ESP32
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bool
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select CPU_COMMON_ESP
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select CPU_CORE_XTENSA_LX6
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select HAS_ARCH_ESP32
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select HAS_CPU_ESP32
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select HAS_ESP_WIFI_ENTERPRISE
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select HAS_PERIPH_ADC_CTRL
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select HAS_PUF_SRAM
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select PACKAGE_ESP32_SDK if TEST_KCONFIG
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select MODULE_LIBC_GETTIMEOFDAY if TEST_KCONFIG
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select MODULE_MALLOC_THREAD_SAFE if !MODULE_ESP_IDF_HEAP && TEST_KCONFIG
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select MODULE_RTT_RTC if HAS_PERIPH_RTT && MODULE_PERIPH_RTC
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select MODULE_PERIPH_RTT if HAS_PERIPH_RTT && MODULE_PM_LAYERED
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select MODULE_PS if MODULE_SHELL
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select MODULE_PTHREAD if MODULE_CPP
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imply MODULE_NEWLIB_NANO
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## CPU Models
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config CPU_MODEL_ESP32_WROOM_32
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bool
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select CPU_FAM_ESP32
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config CPU_MODEL_ESP32_WROVER
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bool
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select CPU_FAM_ESP32
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select HAS_ESP_SPI_RAM
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config CPU_MODEL_ESP32_WROVER_B
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bool
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select CPU_FAM_ESP32
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select HAS_ESP_SPI_RAM
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config CPU_MODEL_ESP32_WROVER_E
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bool
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select CPU_FAM_ESP32
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select HAS_ESP_SPI_RAM
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config CPU_MODEL_ESP32_D0WD
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bool
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select CPU_FAM_ESP32
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## Definition of specific features
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config HAS_ARCH_ESP32
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bool
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help
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Indicates that the current architecture is ESP32.
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config HAS_CPU_ESP32
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bool
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help
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Indicates that the current CPU is 'esp32'.
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config HAS_ESP_RTC_TIMER_32K
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bool
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help
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Indicates that an external 32.768 kHz crystal is connected to the ESP32
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in the board.
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config HAS_ESP_SPI_RAM
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bool
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help
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Indicates that an external RAM is connected via the FSPI interface in
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the board.
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config HAS_PERIPH_ADC_CTRL
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bool
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help
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Indicates that an ESP32 ADC controller peripheral is present.
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## Common CPU symbols
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config CPU_CORE
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default "xtensa-lx6" if CPU_CORE_XTENSA_LX6
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config CPU_FAM
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default "esp32" if CPU_FAM_ESP32
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config CPU_MODEL
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default "esp32-wroom_32" if CPU_MODEL_ESP32_WROOM_32
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default "esp32-wrover" if CPU_MODEL_ESP32_WROVER
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default "esp32-wrover" if CPU_MODEL_ESP32_WROVER_B
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default "esp32-wrover" if CPU_MODEL_ESP32_WROVER_E
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default "esp32-d0wd" if CPU_MODEL_ESP32_D0WD
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config CPU
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default "esp32" if CPU_FAM_ESP32
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menu "ESP32 specific configurations"
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depends on TEST_KCONFIG
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depends on HAS_ARCH_ESP32
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choice
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bool "CPU clock frequency"
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default ESP32_DEFAULT_CPU_FREQ_MHZ_80
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config ESP32_DEFAULT_CPU_FREQ_MHZ_2
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bool "2 MHz"
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config ESP32_DEFAULT_CPU_FREQ_MHZ_40
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bool "40 MHz"
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config ESP32_DEFAULT_CPU_FREQ_MHZ_80
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bool "80 MHz"
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config ESP32_DEFAULT_CPU_FREQ_MHZ_160
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bool "160 MHz"
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config ESP32_DEFAULT_CPU_FREQ_MHZ_240
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bool "240 MHz"
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endchoice
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config MODULE_ESP_SPI_RAM
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bool "SPI RAM support"
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depends on HAS_ESP_SPI_RAM
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select MODULE_ESP_IDF_EFUSE
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select MODULE_ESP_IDF_GPIO
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select MODULE_ESP_IDF_HEAP
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select MODULE_ESP_IDF_SPI_FLASH
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select MODULE_ESP_IDF_SPI_RAM
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help
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Say y to use external SPI RAM connected through the FSPI interface.
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config MODULE_ESP_JTAG
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bool "Enable JTAG debugging interface"
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depends on HAS_ESP_JTAG
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endmenu
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rsource "bootloader/Kconfig"
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rsource "esp-idf/Kconfig"
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rsource "periph/Kconfig"
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source "$(RIOTCPU)/esp_common/Kconfig"
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