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8afc8dfdc3
cpu/kinetis_common/wdog.c: move wdog disable code to initial wdog driver cpu/kinetis_common/wdog.c: add COP WDOG cpu/kinetis_common/include/wdog.h: add configuration example cpu/kinetis_common: add fault handlers cpu/kinetis_common: add .ramcode and ISR vector relocation to startup.c
130 lines
3.9 KiB
C
130 lines
3.9 KiB
C
/*
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* Copyright (C) 2014 Freie Universität Berlin
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* Copyright (C) 2015 PHYTEC Messtechnik GmbH
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* Copyright (C) 2015 Eistec AB
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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* @ingroup cpu_kinetis_common
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* @{
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*
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* @file
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* @brief Startup code for Freescale Kinetis MCUs
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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* @author Johann Fischer <j.fischer@phytec.de>
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* @author Joakim Gebart <joakim.gebart@eistec.se>
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*
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* @}
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*/
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#include <stdint.h>
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#include "cpu-conf.h"
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#include "wdog.h"
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/**
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* @name Memory markers as defined in the linker script
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* @{
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*/
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extern uint32_t _sfixed[];
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extern uint32_t _efixed[];
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extern uint32_t _etext[];
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extern uint32_t _srelocate[];
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extern uint32_t _erelocate[];
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extern uint32_t _szero[];
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extern uint32_t _ezero[];
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extern uint32_t _sstack[];
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extern uint32_t _ramcode_start[];
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extern uint32_t _ramcode_end[];
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extern uint32_t _ramcode_load[];
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extern uint32_t _vector_ram_start[];
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extern uint32_t _vector_ram_end[];
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extern uint32_t _vector_rom[];
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/** @} */
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/**
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* @brief functions for initializing the board, std-lib and kernel
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*/
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extern void board_init(void);
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extern void kernel_init(void);
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extern void __libc_init_array(void);
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/**
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* @brief This function is the entry point after a system reset
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*
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* After a system reset, the following steps are necessary and carried out:
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* 0. disable the Watchdog Timer
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* 1. load data section from flash to ram
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* 2. overwrite uninitialized data section (BSS) with zeros
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* 3. initialize the newlib
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* 4. initialize the board (sync clock, setup std-IO)
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* 5. initialize and start RIOTs kernel
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*/
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void reset_handler(void)
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{
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uint32_t *dst;
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uint32_t *src = _etext;
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/* disable the WDOG */
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wdog_disable();
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/* load .data section from flash to ram */
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for (dst = _srelocate; dst < _erelocate;) {
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*(dst++) = *(src++);
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}
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/* default .bss section to zero */
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for (dst = _szero; dst < _ezero;) {
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*(dst++) = 0;
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}
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/* copy .ramcode from flash to RAM */
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src = _ramcode_load;
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for (dst = _ramcode_start; dst < _ramcode_end;) {
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*(dst++) = *(src++);
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}
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/*
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* Copy ISR vector from flash to RAM.
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*
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* To use this CPU feature, define RAMVECT_SIZE=0x400 when building and write
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* the new vector table address in RAM to SCB->VTOR.
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*/
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src = _vector_rom;
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for (dst = _vector_ram_start; dst < _vector_ram_end;) {
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*(dst++) = *(src++);
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}
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/* initialize the board and startup the kernel */
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board_init();
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/* initialize std-c library (this should be done after board_init) */
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__libc_init_array();
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/* startup the kernel */
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kernel_init();
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}
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/* fcfield table */
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__attribute__((weak, section(".fcfield")))
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const uint8_t flash_configuration_field[] = {
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0xff, /* backdoor comparison key 3., offset: 0x0 */
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0xff, /* backdoor comparison key 2., offset: 0x1 */
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0xff, /* backdoor comparison key 1., offset: 0x2 */
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0xff, /* backdoor comparison key 0., offset: 0x3 */
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0xff, /* backdoor comparison key 7., offset: 0x4 */
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0xff, /* backdoor comparison key 6., offset: 0x5 */
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0xff, /* backdoor comparison key 5., offset: 0x6 */
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0xff, /* backdoor comparison key 4., offset: 0x7 */
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0xff, /* non-volatile p-flash protection 1 - low register, offset: 0x8 */
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0xff, /* non-volatile p-flash protection 1 - high register, offset: 0x9 */
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0xff, /* non-volatile p-flash protection 0 - low register, offset: 0xa */
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0xff, /* non-volatile p-flash protection 0 - high register, offset: 0xb */
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0xfe, /* non-volatile flash security register, offset: 0xc */
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0xff, /* non-volatile flash option register, offset: 0xd */
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0xff, /* non-volatile eeram protection register, offset: 0xe */
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0xff, /* non-volatile d-flash protection register, offset: 0xf */
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};
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