/* * Copyright (C) 2014 Freie Universität Berlin * * This file is subject to the terms and conditions of the GNU Lesser General * Public License v2.1. See the file LICENSE in the top level directory for more * details. */ /** * @ingroup boards_f4vi1 * @{ * * @file * @name Peripheral MCU configuration for the F4VI1 board * * @author Stefan Pfeiffer * @author Hauke Petersen * @author Peter Kietzmann */ #ifndef PERIPH_CONF_H #define PERIPH_CONF_H /* This board provides an HSE */ #ifndef CONFIG_BOARD_HAS_HSE #define CONFIG_BOARD_HAS_HSE 1 #endif /* The HSE provides a 16MHz clock */ #define CLOCK_HSE MHZ(16) #include "periph_cpu.h" #include "clk_conf.h" #ifdef __cplusplus extern "C" { #endif /** * @name Timer configuration * @{ */ static const timer_conf_t timer_config[] = { { .dev = TIM2, .max = 0xffffffff, .rcc_mask = RCC_APB1ENR_TIM2EN, .bus = APB1, .irqn = TIM2_IRQn }, { .dev = TIM5, .max = 0xffffffff, .rcc_mask = RCC_APB1ENR_TIM5EN, .bus = APB1, .irqn = TIM5_IRQn } }; #define TIMER_0_ISR isr_tim2 #define TIMER_1_ISR isr_tim5 #define TIMER_NUMOF ARRAY_SIZE(timer_config) /** @} */ /** * @name UART configuration * @{ */ static const uart_conf_t uart_config[] = { { .dev = USART6, .rcc_mask = RCC_APB2ENR_USART6EN, .rx_pin = GPIO_PIN(PORT_C, 7), .tx_pin = GPIO_PIN(PORT_C, 6), .rx_af = GPIO_AF8, .tx_af = GPIO_AF8, .bus = APB2, .irqn = USART6_IRQn, #ifdef MODULE_PERIPH_DMA .dma = DMA_STREAM_UNDEF, .dma_chan = UINT8_MAX, #endif } }; #define UART_0_ISR (isr_usart6) #define UART_NUMOF ARRAY_SIZE(uart_config) /** @} */ #ifdef __cplusplus } #endif #endif /* PERIPH_CONF_H */ /** @} */