RAM_START_ADDR ?= 0x20000000
RAM_LEN ?= 32K

ROM_START_ADDR ?= 0x08000000
ROM_LEN ?= 128K

LINKER_SCRIPT ?= riscv.ld

CFLAGS += -DCPU_MODEL_$(call uppercase_and_underscore,$(CPU_MODEL))

include $(RIOTCPU)/riscv_common/Makefile.include