# Copyright (c) 2021 HAW Hamburg
#
# This file is subject to the terms and conditions of the GNU Lesser
# General Public License v2.1. See the file LICENSE in the top level
# directory for more details.
#

if TEST_KCONFIG

config MODULE_ESP_RTC_TIMER_32K
    bool
    depends on HAS_ESP_RTC_TIMER_32K
    default y if MODULE_PERIPH_RTT
    help
      Use RTC timer with external 32.768 kHz crystal as RTT.

config MODULE_PERIPH_RTT_HW_SYS
    bool
    default y if MODULE_PERIPH_RTT

config MODULE_PERIPH_RTT_HW_RTC
    bool
    default y if MODULE_PERIPH_RTT

config MODULE_ESP_HW_COUNTER
    bool "Use hardware counter as low-level timer peripheral"
    depends on HAS_ESP_HW_COUNTER
    depends on MODULE_PERIPH_TIMER
    help
        ESP SoCs with Xtensa cores typically have a set of CCOUNT and CCOMPARE
        registers that can be used as low-level timer peripherals. Use this
        option to enable these CCOUNT and CCOMPARE register as low-level timer.

choice ESP_FLASHPAGE_CAPACITY
    bool "Flashpage capacity"
    default ESP_FLASHPAGE_CAPACITY_512K
    depends on MODULE_PERIPH_FLASHPAGE
    config ESP_FLASHPAGE_CAPACITY_64K
        bool "64 kByte"
    config ESP_FLASHPAGE_CAPACITY_128K
        bool "128 kByte"
    config ESP_FLASHPAGE_CAPACITY_256K
        bool "256 kByte"
    config ESP_FLASHPAGE_CAPACITY_512K
        bool "512 kByte"
    config ESP_FLASHPAGE_CAPACITY_1M
        bool "1 MByte"
    config ESP_FLASHPAGE_CAPACITY_2M
        bool "2 MByte"
endchoice

endif # TEST_KCONFIG