/* * Copyright (C) 2016 Fundacion Inria Chile * * This file is subject to the terms and conditions of the GNU Lesser General * Public License v2.1. See the file LICENSE in the top level directory for more * details. */ /** * @ingroup boards_nz32-sc151 * @{ * * @file * @brief Peripheral MCU configuration for the limifrog-v1 board * * @author Francisco Molina */ #ifndef PERIPH_CONF_H #define PERIPH_CONF_H #include "periph_cpu.h" #include "clk_conf.h" #include "cfg_timer_tim5.h" #ifdef __cplusplus extern "C" { #endif /** * @name UART configuration * @{ */ static const uart_conf_t uart_config[] = { { .dev = USART3, .rcc_mask = RCC_APB1ENR_USART3EN, .rx_pin = GPIO_PIN(PORT_B, 11), .tx_pin = GPIO_PIN(PORT_B, 10), .rx_af = GPIO_AF7, .tx_af = GPIO_AF7, .bus = APB1, .irqn = USART3_IRQn }, { .dev = USART2, .rcc_mask = RCC_APB1ENR_USART2EN, .rx_pin = GPIO_PIN(PORT_A, 3), .tx_pin = GPIO_PIN(PORT_A, 2), .rx_af = GPIO_AF7, .tx_af = GPIO_AF7, .bus = APB1, .irqn = USART2_IRQn }, { .dev = USART1, .rcc_mask = RCC_APB2ENR_USART1EN, .rx_pin = GPIO_PIN(PORT_A, 10), .tx_pin = GPIO_PIN(PORT_A, 9), .rx_af = GPIO_AF7, .tx_af = GPIO_AF7, .bus = APB2, .irqn = USART1_IRQn } }; #define UART_0_ISR (isr_usart3) #define UART_1_ISR (isr_usart2) #define UART_2_ISR (isr_usart1) #define UART_NUMOF ARRAY_SIZE(uart_config) /** @} */ /** * @name PWM configuration * @{ */ static const pwm_conf_t pwm_config[] = { { .dev = TIM3, .rcc_mask = RCC_APB1ENR_TIM3EN, .chan = { { .pin = GPIO_PIN(PORT_C, 6), .cc_chan = 0 }, { .pin = GPIO_PIN(PORT_C, 7), .cc_chan = 1 }, { .pin = GPIO_PIN(PORT_C, 8), .cc_chan = 2 }, { .pin = GPIO_PIN(PORT_C, 9), .cc_chan = 3 } }, .af = GPIO_AF2, .bus = APB1 } }; #define PWM_NUMOF ARRAY_SIZE(pwm_config) /** @} */ /** * @name SPI configuration * @{ */ static const spi_conf_t spi_config[] = { { .dev = SPI1, .mosi_pin = GPIO_PIN(PORT_B, 5), .miso_pin = GPIO_PIN(PORT_B, 4), .sclk_pin = GPIO_PIN(PORT_B, 3), .cs_pin = SPI_CS_UNDEF, .mosi_af = GPIO_AF5, .miso_af = GPIO_AF5, .sclk_af = GPIO_AF5, .cs_af = GPIO_AF5, .rccmask = RCC_APB2ENR_SPI1EN, .apbbus = APB2 }, { .dev = SPI2, .mosi_pin = GPIO_PIN(PORT_B, 15), .miso_pin = GPIO_PIN(PORT_B, 14), .sclk_pin = GPIO_PIN(PORT_B, 13), .cs_pin = SPI_CS_UNDEF, .mosi_af = GPIO_AF5, .miso_af = GPIO_AF5, .sclk_af = GPIO_AF5, .cs_af = GPIO_AF5, .rccmask = RCC_APB1ENR_SPI2EN, .apbbus = APB1 }, { .dev = SPI3, .mosi_pin = GPIO_PIN(PORT_C, 12), .miso_pin = GPIO_PIN(PORT_C, 11), .sclk_pin = GPIO_PIN(PORT_C, 10), .cs_pin = SPI_CS_UNDEF, .mosi_af = GPIO_AF6, .miso_af = GPIO_AF6, .sclk_af = GPIO_AF6, .cs_af = GPIO_AF6, .rccmask = RCC_APB1ENR_SPI3EN, .apbbus = APB1 } }; #define SPI_NUMOF ARRAY_SIZE(spi_config) /** @} */ /** * @name I2C configuration * @{ */ static const i2c_conf_t i2c_config[] = { { .dev = I2C1, .speed = I2C_SPEED_NORMAL, .scl_pin = GPIO_PIN(PORT_B, 8), .sda_pin = GPIO_PIN(PORT_B, 9), .scl_af = GPIO_AF4, .sda_af = GPIO_AF4, .bus = APB1, .rcc_mask = RCC_APB1ENR_I2C1EN, .clk = CLOCK_APB1, .irqn = I2C1_EV_IRQn } }; #define I2C_0_ISR isr_i2c1_ev #define I2C_NUMOF ARRAY_SIZE(i2c_config) /** @} */ /** * @name ADC configuration * @{ */ static const adc_conf_t adc_config[] = { { GPIO_PIN(PORT_C, 0), 10 }, { GPIO_PIN(PORT_C, 1), 11 }, { GPIO_PIN(PORT_C, 2), 12 }, /* ADC Temperature channel */ { GPIO_UNDEF, 16 }, /* ADC VREF channel */ { GPIO_UNDEF, 17 }, }; #define ADC_NUMOF ARRAY_SIZE(adc_config) /** @} */ /** * @name DAC configuration * @{ */ static const dac_conf_t dac_config[] = { { .pin = GPIO_PIN(PORT_A, 4), .chan = 0 }, { .pin = GPIO_PIN(PORT_A, 5), .chan = 1 } }; #define DAC_NUMOF ARRAY_SIZE(dac_config) /** @} */ #ifdef __cplusplus } #endif #endif /* PERIPH_CONF_H */ /** @} */