# Define the CPU family so we can differentiate between them in the code
CFLAGS += -DCPU_FAM_$(call uppercase_and_underscore,$(CPU_FAM))

# Set ROM and RAM lengths according to CPU model
ifneq (,$(filter samd21g18a samd21j18a saml21j18b saml21j18a samr21e18a \
        samr21g18a samr30g18a samr34j18b,$(CPU_MODEL)))

  ROM_LEN ?= 0x40000
  RAM_LEN ?= 0x8000
endif
ifneq (,$(filter saml10e16a saml11e16a,$(CPU_MODEL)))
  ROM_LEN ?= 64K
  RAM_LEN ?= 16K
endif
ifneq (,$(filter samd51j20a same54p20a,$(CPU_MODEL)))
  ROM_LEN ?= 1024K
  RAM_LEN ?= 256K
endif

ROM_START_ADDR ?= 0x00000000
RAM_START_ADDR ?= 0x20000000

# this CPU implementation doesn't use CMSIS initialization
CFLAGS += -DDONT_USE_CMSIS_INIT
CFLAGS += -DDONT_USE_PREDEFINED_CORE_HANDLERS
CFLAGS += -DDONT_USE_PREDEFINED_PERIPHERALS_HANDLERS

# For Cortex-M cpu we use the common cortexm.ld linker script
LINKER_SCRIPT ?= cortexm.ld

# include sam0 common periph drivers
USEMODULE += sam0_common_periph

INCLUDES += -I$(RIOTCPU)/sam0_common/include