/* * Copyright (C) 2018 Freie Universität Berlin * 2017 OTA keys S.A. * 2018-2020 Inria * * This file is subject to the terms and conditions of the GNU Lesser * General Public License v2.1. See the file LICENSE in the top level * directory for more details. */ /** * @ingroup cpu_stm32 * @{ * * @file * @brief Base STM32F4 clock configuration * * @author Hauke Petersen * @author Vincent Dupont * @author Alexandre Abadie */ #ifndef CLK_F2F4F7_CFG_CLOCK_COMMON_H #define CLK_F2F4F7_CFG_CLOCK_COMMON_H #ifdef __cplusplus extern "C" { #endif /** * @name Clock common configuration * @{ */ /* Select the desired system clock source between PLL, HSE or HSI */ #ifndef CONFIG_USE_CLOCK_PLL #if IS_ACTIVE(CONFIG_USE_CLOCK_HSE) || IS_ACTIVE(CONFIG_USE_CLOCK_HSI) #define CONFIG_USE_CLOCK_PLL 0 #else #define CONFIG_USE_CLOCK_PLL 1 /* Use PLL by default */ #endif #endif /* CONFIG_USE_CLOCK_PLL */ #ifndef CONFIG_USE_CLOCK_HSE #define CONFIG_USE_CLOCK_HSE 0 #endif /* CONFIG_USE_CLOCK_HSE */ #ifndef CONFIG_USE_CLOCK_HSI #define CONFIG_USE_CLOCK_HSI 0 #endif /* CONFIG_USE_CLOCK_HSI */ #if IS_ACTIVE(CONFIG_USE_CLOCK_PLL) && \ (IS_ACTIVE(CONFIG_USE_CLOCK_HSE) || IS_ACTIVE(CONFIG_USE_CLOCK_HSI)) #error "Cannot use PLL as clock source with other clock configurations" #endif #if IS_ACTIVE(CONFIG_USE_CLOCK_HSE) && \ (IS_ACTIVE(CONFIG_USE_CLOCK_PLL) || IS_ACTIVE(CONFIG_USE_CLOCK_HSI)) #error "Cannot use HSE as clock source with other clock configurations" #endif #if IS_ACTIVE(CONFIG_USE_CLOCK_HSI) && \ (IS_ACTIVE(CONFIG_USE_CLOCK_PLL) || IS_ACTIVE(CONFIG_USE_CLOCK_HSE)) #error "Cannot use HSI as clock source with other clock configurations" #endif #ifndef CONFIG_BOARD_HAS_HSE #define CONFIG_BOARD_HAS_HSE 0 #endif #ifndef CLOCK_HSE #define CLOCK_HSE MHZ(8) #endif #ifndef CONFIG_BOARD_HAS_LSE #define CONFIG_BOARD_HAS_LSE 0 #endif #define CLOCK_HSI MHZ(16) #ifdef __cplusplus } #endif #endif /* CLK_F2F4F7_CFG_CLOCK_COMMON_H */ /** @} */