From ae4c3076113b0b746bea04206d0186bce99fb4d1 Mon Sep 17 00:00:00 2001
From: Gunar Schorcht <gunar@schorcht.net>
Date: Thu, 10 Mar 2022 13:10:23 +0100
Subject: [PATCH 20/20] freertos/portasm: changes for RIOT for riscv32

A number of symbols that are used by assembler code have to be mapped to existing symbols in RIOT implementation. Furthermore, the ISR stack `port_IntStack`has to be allocated.
---
 components/freertos/port/riscv/portasm.S | 27 ++++++++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/components/freertos/port/riscv/portasm.S b/components/freertos/port/riscv/portasm.S
index 20c094b7a68..8aeabb3dedc 100644
--- a/components/freertos/port/riscv/portasm.S
+++ b/components/freertos/port/riscv/portasm.S
@@ -12,6 +12,22 @@
 // See the License for the specific language governing permissions and
 // limitations under the License.
 
+#ifdef RIOT_VERSION
+#include "cpu_conf.h"
+
+#define pxCurrentTCB            sched_active_thread
+#define uxSchedulerRunning      sched_num_threads
+#define xPortSwitchFlag         sched_context_switch_request
+#define vTaskSwitchContext      sched_run
+#define uxInterruptNesting      irq_interrupt_nesting
+#define configISR_STACK_SIZE    ESP_ISR_STACKSIZE
+
+.extern sched_active_thread
+.extern sched_num_threads
+.extern sched_context_switch_request
+.extern irq_interrupt_nesting
+#endif
+
     .global uxInterruptNesting
     .global uxSchedulerRunning
     .global xIsrStackTop
@@ -19,6 +35,14 @@
     .global vTaskSwitchContext
     .global xPortSwitchFlag
 
+    .data
+    .align      16
+    .global     port_IntStack
+port_IntStack:
+    .space      configISR_STACK_SIZE
+    .global     port_IntStackTop
+port_IntStackTop:
+
     .section .text
 
 /**
@@ -50,7 +74,10 @@ rtos_int_enter:
 
     /* Save current TCB and load the ISR stack */
     lw  t0, pxCurrentTCB
+    beq t0, zero, rtos_enter_isr_stack
     sw 	t2, 0x0(t0)
+
+rtos_enter_isr_stack:
     lw  sp, xIsrStackTop
 
 rtos_enter_end:
-- 
2.17.1