# Define the CPU family so we can differentiate between them in the code
CFLAGS += -DCPU_FAM_$(call uppercase_and_underscore,$(CPU_FAM))

# Generate ASF compatible model definition
CFLAGS += -D__$(call uppercase_and_underscore,$(CPU_MODEL))__

# Compute CPU_LINE
LINE   := $(shell echo $(CPU_MODEL) | sed -E -e 's/^sam([a-z][0-9][0-9])(.)([0-9][0-9])(.)*/\1 \2 \3 \4/')
FAMILY := $(word 1, $(LINE))
TYPE1  := $(word 2, $(LINE))
MEMORY := $(word 3, $(LINE))
TYPE2  := $(word 4, $(LINE))

# ROM length is directly encoded in the part number
ROM_LEN := $(shell echo $$((1 << $(MEMORY))))

# get vendor file to extract RAM length
VENDOR_FILE := $(shell find $(RIOTCPU)/sam0_common/include/vendor/sam$(FAMILY) -name $(CPU_MODEL).h | grep include.*/sam)
RAM_LEN := $(shell sed -E -n 's/\#define (HRAMC0_SIZE|HMCRAMC0_SIZE|HSRAM_SIZE).*(0x[[:xdigit:]]*).*/\2/p' $(VENDOR_FILE))

ROM_START_ADDR ?= 0x00000000
RAM_START_ADDR ?= 0x20000000

# this CPU implementation doesn't use CMSIS initialization
CFLAGS += -DDONT_USE_CMSIS_INIT
CFLAGS += -DDONT_USE_PREDEFINED_CORE_HANDLERS
CFLAGS += -DDONT_USE_PREDEFINED_PERIPHERALS_HANDLERS

# For Cortex-M cpu we use the common cortexm.ld linker script
LINKER_SCRIPT ?= cortexm.ld

INCLUDES += -I$(RIOTCPU)/sam0_common/include

ifneq (,$(filter sam0_eth,$(USEMODULE)))
  INCLUDES += -I$(RIOTCPU)/sam0_common/sam0_eth/
endif

PSEUDOMODULES += periph_rtc
PSEUDOMODULES += periph_rtt