/******************************************************************************
*  Filename:       hw_cpu_tiprop_h
*  Revised:        2017-01-31 09:37:48 +0100 (Tue, 31 Jan 2017)
*  Revision:       48345
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
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* 2) Redistributions in binary form must reproduce the above copyright notice,
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*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
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*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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******************************************************************************/

#ifndef __HW_CPU_TIPROP_H__
#define __HW_CPU_TIPROP_H__

//*****************************************************************************
//
// This section defines the register offsets of
// CPU_TIPROP component
//
//*****************************************************************************
// Internal
#define CPU_TIPROP_O_TRACECLKMUX                                    0x00000FF8

// Internal
#define CPU_TIPROP_O_DYN_CG                                         0x00000FFC

//*****************************************************************************
//
// Register: CPU_TIPROP_O_TRACECLKMUX
//
//*****************************************************************************
// Field:     [0] TRACECLK_N_SWV
//
// Internal. Only to be used through TI provided API.
// ENUMs:
// TRACECLK                 Internal. Only to be used through TI provided API.
// SWV                      Internal. Only to be used through TI provided API.
#define CPU_TIPROP_TRACECLKMUX_TRACECLK_N_SWV                       0x00000001
#define CPU_TIPROP_TRACECLKMUX_TRACECLK_N_SWV_BITN                           0
#define CPU_TIPROP_TRACECLKMUX_TRACECLK_N_SWV_M                     0x00000001
#define CPU_TIPROP_TRACECLKMUX_TRACECLK_N_SWV_S                              0
#define CPU_TIPROP_TRACECLKMUX_TRACECLK_N_SWV_TRACECLK              0x00000001
#define CPU_TIPROP_TRACECLKMUX_TRACECLK_N_SWV_SWV                   0x00000000

//*****************************************************************************
//
// Register: CPU_TIPROP_O_DYN_CG
//
//*****************************************************************************
// Field:   [1:0] DYN_CG
//
// Internal. Only to be used through TI provided API.
#define CPU_TIPROP_DYN_CG_DYN_CG_W                                           2
#define CPU_TIPROP_DYN_CG_DYN_CG_M                                  0x00000003
#define CPU_TIPROP_DYN_CG_DYN_CG_S                                           0


#endif // __CPU_TIPROP__