/* * Copyright (C) 2017 INRIA * * This file is subject to the terms and conditions of the GNU Lesser * General Public License v2.1. See the file LICENSE in the top level * directory for more details. */ /** * @ingroup boards_opencm904 * @{ * * @file * @brief Peripheral MCU configuration for the opencm904 board * * @author Loïc Dauphin */ #ifndef PERIPH_CONF_H #define PERIPH_CONF_H /* This board provides an HSE */ #ifndef CONFIG_BOARD_HAS_HSE #define CONFIG_BOARD_HAS_HSE 1 #endif #include "periph_cpu.h" #include "clk_conf.h" #ifdef __cplusplus extern "C" { #endif /** * @name Timer configuration * @{ */ static const timer_conf_t timer_config[] = { { .dev = TIM2, .max = 0x0000ffff, .rcc_mask = RCC_APB1ENR_TIM2EN, .bus = APB1, .irqn = TIM2_IRQn }, { .dev = TIM3, .max = 0x0000ffff, .rcc_mask = RCC_APB1ENR_TIM3EN, .bus = APB1, .irqn = TIM3_IRQn } }; #define TIMER_0_ISR isr_tim2 #define TIMER_1_ISR isr_tim3 #define TIMER_NUMOF ARRAY_SIZE(timer_config) /** @} */ /** * @name UART configuration * @{ */ static const uart_conf_t uart_config[] = { { .dev = USART2, .rcc_mask = RCC_APB1ENR_USART2EN, .rx_pin = GPIO_PIN(PORT_A, 3), .tx_pin = GPIO_PIN(PORT_A, 2), .bus = APB1, .irqn = USART2_IRQn }, { .dev = USART1, .rcc_mask = RCC_APB2ENR_USART1EN, .rx_pin = GPIO_PIN(PORT_B, 7), .tx_pin = GPIO_PIN(PORT_B, 6), .bus = APB2, .irqn = USART1_IRQn }, { .dev = USART3, .rcc_mask = RCC_APB1ENR_USART3EN, .rx_pin = GPIO_PIN(PORT_B, 11), .tx_pin = GPIO_PIN(PORT_B, 10), .bus = APB1, .irqn = USART3_IRQn } }; #define UART_0_ISR isr_usart2 #define UART_1_ISR isr_usart1 #define UART_2_ISR isr_usart3 #define UART_NUMOF ARRAY_SIZE(uart_config) /** @} */ #ifdef __cplusplus } #endif #endif /* PERIPH_CONF_H */ /** @} */