/* * Copyright (C) 2016-2017 OTA keys S.A. * * This file is subject to the terms and conditions of the GNU Lesser * General Public License v2.1. See the file LICENSE in the top level * directory for more details. */ /** * @ingroup boards_nucleo-f207zg * @{ * * @file * @name Peripheral MCU configuration for the nucleo-f207zg board * * @author Vincent Dupont * @author Aurelien Gonce * @author Toon Stegen */ #ifndef PERIPH_CONF_H #define PERIPH_CONF_H #include "periph_cpu.h" #include "f2/cfg_clock_120_8_1.h" #include "cfg_i2c1_pb8_pb9.h" #ifdef __cplusplus extern "C" { #endif /** * @name DMA streams configuration * @{ */ #ifdef MODULE_PERIPH_DMA static const dma_conf_t dma_config[] = { { .stream = 10 }, /* DMA2 Stream 2 - SPI1_RX */ { .stream = 11 }, /* DMA2 Stream 3 - SPI1_TX */ { .stream = 3 }, /* DMA1 Stream 3 - SPI2_RX/USART3_TX */ { .stream = 4 }, /* DMA1 Stream 4 - SPI2_TX */ { .stream = 14 }, /* DMA2 Stream 6 - USART6_TX */ { .stream = 6 }, /* DMA1 Stream 6 - USART2_TX */ }; #define DMA_0_ISR isr_dma2_stream2 #define DMA_1_ISR isr_dma2_stream3 #define DMA_2_ISR isr_dma1_stream3 #define DMA_3_ISR isr_dma1_stream4 #define DMA_4_ISR isr_dma2_stream6 #define DMA_5_ISR isr_dma1_stream6 #define DMA_NUMOF (sizeof(dma_config) / sizeof(dma_config[0])) #endif /** @} */ /** * @name PWM configuration * @{ */ static const pwm_conf_t pwm_config[] = { { .dev = TIM1, .rcc_mask = RCC_APB2ENR_TIM1EN, .chan = { { .pin = GPIO_PIN(PORT_E, 9) /* D6 */, .cc_chan = 0}, { .pin = GPIO_PIN(PORT_E, 11) /* D5 */, .cc_chan = 1}, { .pin = GPIO_PIN(PORT_E, 13) /* D3 */, .cc_chan = 2}, { .pin = GPIO_UNDEF, .cc_chan = 0} }, .af = GPIO_AF1, .bus = APB2 }, { .dev = TIM4, .rcc_mask = RCC_APB1ENR_TIM4EN, .chan = { { .pin = GPIO_PIN(PORT_D, 15) /* D9 */, .cc_chan = 3}, { .pin = GPIO_UNDEF, .cc_chan = 0}, { .pin = GPIO_UNDEF, .cc_chan = 0}, { .pin = GPIO_UNDEF, .cc_chan = 0} }, .af = GPIO_AF2, .bus = APB1 }, }; #define PWM_NUMOF (sizeof(pwm_config) / sizeof(pwm_config[0])) /** @} */ /** * @name Timer configuration * @{ */ static const timer_conf_t timer_config[] = { { .dev = TIM2, .max = 0xffffffff, .rcc_mask = RCC_APB1ENR_TIM2EN, .bus = APB1, .irqn = TIM2_IRQn }, { .dev = TIM5, .max = 0xffffffff, .rcc_mask = RCC_APB1ENR_TIM5EN, .bus = APB1, .irqn = TIM5_IRQn } }; #define TIMER_0_ISR isr_tim2 #define TIMER_1_ISR isr_tim5 #define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0])) /** @} */ /** * @name UART configuration * @{ */ static const uart_conf_t uart_config[] = { { .dev = USART3, .rcc_mask = RCC_APB1ENR_USART3EN, .rx_pin = GPIO_PIN(PORT_D, 9), .tx_pin = GPIO_PIN(PORT_D, 8), .rx_af = GPIO_AF7, .tx_af = GPIO_AF7, .bus = APB1, .irqn = USART3_IRQn, #ifdef MODULE_PERIPH_DMA .dma = 2, .dma_chan = 4 #endif }, { .dev = USART6, .rcc_mask = RCC_APB2ENR_USART6EN, .rx_pin = GPIO_PIN(PORT_G, 9), .tx_pin = GPIO_PIN(PORT_G, 14), .rx_af = GPIO_AF8, .tx_af = GPIO_AF8, .bus = APB2, .irqn = USART6_IRQn, #ifdef MODULE_PERIPH_DMA .dma = 4, .dma_chan = 5 #endif }, { .dev = USART2, .rcc_mask = RCC_APB1ENR_USART2EN, .rx_pin = GPIO_PIN(PORT_D, 6), .tx_pin = GPIO_PIN(PORT_D, 5), .rx_af = GPIO_AF7, .tx_af = GPIO_AF7, .bus = APB1, .irqn = USART2_IRQn, #ifdef MODULE_PERIPH_DMA .dma = 5, .dma_chan = 4 #endif }, }; #define UART_0_ISR (isr_usart3) #define UART_1_ISR (isr_usart6) #define UART_2_ISR (isr_usart2) #define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0])) /** @} */ /** * @name SPI configuration * * @note The spi_divtable is auto-generated from * `cpu/stm32_common/dist/spi_divtable/spi_divtable.c` * @{ */ static const uint8_t spi_divtable[2][5] = { { /* for APB1 @ 30000000Hz */ 7, /* -> 117187Hz */ 5, /* -> 468750Hz */ 4, /* -> 937500Hz */ 2, /* -> 3750000Hz */ 1 /* -> 7500000Hz */ }, { /* for APB2 @ 60000000Hz */ 7, /* -> 234375Hz */ 6, /* -> 468750Hz */ 5, /* -> 937500Hz */ 3, /* -> 3750000Hz */ 2 /* -> 7500000Hz */ } }; static const spi_conf_t spi_config[] = { { .dev = SPI1, .mosi_pin = GPIO_PIN(PORT_A, 7), .miso_pin = GPIO_PIN(PORT_A, 6), .sclk_pin = GPIO_PIN(PORT_A, 5), .cs_pin = GPIO_PIN(PORT_A, 4), .af = GPIO_AF5, .rccmask = RCC_APB2ENR_SPI1EN, .apbbus = APB2, #ifdef MODULE_PERIPH_DMA .tx_dma = 1, .tx_dma_chan = 3, .rx_dma = 0, .rx_dma_chan = 3, #endif }, { .dev = SPI2, .mosi_pin = GPIO_PIN(PORT_B, 15), .miso_pin = GPIO_PIN(PORT_C, 2), .sclk_pin = GPIO_PIN(PORT_B, 13), .cs_pin = GPIO_PIN(PORT_B, 12), .af = GPIO_AF5, .rccmask = RCC_APB1ENR_SPI2EN, .apbbus = APB1, #ifdef MODULE_PERIPH_DMA .tx_dma = 3, .tx_dma_chan = 0, .rx_dma = 2, .rx_dma_chan = 0, #endif } }; #define SPI_NUMOF (sizeof(spi_config) / sizeof(spi_config[0])) /** @} */ /** * @name ADC configuration * * We need to define the following fields: * PIN, device (ADCx), channel * @{ */ #define ADC_CONFIG { \ {GPIO_PIN(PORT_A, 3), 0, 3}, \ {GPIO_PIN(PORT_C, 0), 1, 0} \ } #define ADC_NUMOF (2) /** @} */ /** * @name RTC configuration * @{ */ #define RTC_NUMOF (1) /** @} */ #ifdef __cplusplus } #endif #endif /* PERIPH_CONF_H */ /** @} */