# Copyright (c) 2020 Freie Universitaet Berlin # 2022 HAW Hamburg # # This file is subject to the terms and conditions of the GNU Lesser # General Public License v2.1. See the file LICENSE in the top level # directory for more details. # if USEMODULE_AT86RF215 menu "Modulations" menuconfig AT86RF215_OQPSK bool "O-QPSK support" default y if AT86RF215_OQPSK choice bool "Default (legacy) O-QPSK rate mode" default AT86RF215_OQPSK_RATE_LOW help The at86rf215 supports proprietary high data rates that are compatible with the at86rf2xx parts. If unsure, select low rate. config AT86RF215_OQPSK_RATE_LOW bool "Low rate mode (compatible)" config AT86RF215_OQPSK_RATE_HIGH bool "High rate mode (proprietary)" endchoice config AT86RF215_DEFAULT_OQPSK_RATE int default 0 if AT86RF215_OQPSK_RATE_LOW default 1 if AT86RF215_OQPSK_RATE_HIGH endif # AT86RF215_OQPSK menuconfig AT86RF215_MR_OQPSK bool "MR-O-QPSK support" default y if AT86RF215_MR_OQPSK config AT86RF215_DEFAULT_MR_OQPSK_RATE int "Default MR-O-QPSK rate mode" range 0 3 default 2 help Default Rate Mode of the MR-O-QPSK PHY. Each increment doubles the PSDU data rate. choice prompt "Default MR-O-QPSK Chip Rate" config AT86RF215_DEFAULT_MR_OQPSK_CHIPS_100 bool "100 kchip/s" config AT86RF215_DEFAULT_MR_OQPSK_CHIPS_200 bool "200 kchip/s" config AT86RF215_DEFAULT_MR_OQPSK_CHIPS_1000 bool "1000 kchip/s" config AT86RF215_DEFAULT_MR_OQPSK_CHIPS_2000 bool "2000 kchip/s" endchoice endif # AT86RF215_MR_OQPSK menuconfig AT86RF215_MR_OFDM bool "MR-OFDM support" default y if AT86RF215_MR_OFDM config AT86RF215_DEFAULT_MR_OFDM_OPT int "Default MR-OFDM option" range 1 4 default 2 help Default Option of the MR-OFDM PHY Each increment halves the PSDU data rate. choice bool "Default MR-OFDM Modulation & Coding Scheme" default AT86RF215_MR_OFDM_MCS_QPSK_R12_FR2 help Default Modulation & Coding Scheme of the MR-OFDM PHY. Higher schemes correspond to higher data rates and lower range. config AT86RF215_MR_OFDM_MCS_BPSK_R12_FR4 bool "BPSK, rate 1⁄2, 4 x frequency repetition" config AT86RF215_MR_OFDM_MCS_BPSK_R12_FR2 bool "BPSK, rate 1⁄2, 2 x frequency repetition" config AT86RF215_MR_OFDM_MCS_QPSK_R12_FR2 bool "QPSK, rate 1⁄2, 2 x frequency repetition" config AT86RF215_MR_OFDM_MCS_QPSK_R12_FR0 bool "QPSK, rate 1⁄2" config AT86RF215_MR_OFDM_MCS_QPSK_R34_FR0 bool "QPSK, rate 3⁄4" config AT86RF215_MR_OFDM_MCS_16QAM_R12_FR0 bool "16-QAM, rate 1⁄2" config AT86RF215_MR_OFDM_MCS_16QAM_R34_FR0 bool "16-QAM, rate 3⁄4" endchoice config AT86RF215_DEFAULT_MR_OFDM_MCS int default 0 if AT86RF215_MR_OFDM_MCS_BPSK_R12_FR4 default 1 if AT86RF215_MR_OFDM_MCS_BPSK_R12_FR2 default 2 if AT86RF215_MR_OFDM_MCS_QPSK_R12_FR2 default 3 if AT86RF215_MR_OFDM_MCS_QPSK_R12_FR0 default 4 if AT86RF215_MR_OFDM_MCS_QPSK_R34_FR0 default 5 if AT86RF215_MR_OFDM_MCS_16QAM_R12_FR0 default 6 if AT86RF215_MR_OFDM_MCS_16QAM_R34_FR0 endif # AT86RF215_MR_OFDM menuconfig AT86RF215_MR_FSK bool "MR-FSK support" default y if AT86RF215_MR_FSK choice bool "Default MR-FSK Symbol Rate" default AT86RF215_MR_FSK_SRATE_200K help Default Symbol Rate of the MR-FSK PHY. config AT86RF215_MR_FSK_SRATE_50K bool "50 KHz" config AT86RF215_MR_FSK_SRATE_100K bool "100 KHz" config AT86RF215_MR_FSK_SRATE_150K bool "150 KHz" config AT86RF215_MR_FSK_SRATE_200K bool "200 KHz" config AT86RF215_MR_FSK_SRATE_300K bool "300 KHz" config AT86RF215_MR_FSK_SRATE_400K bool "400 KHz" endchoice config AT86RF215_DEFAULT_MR_FSK_SRATE int default 0 if AT86RF215_MR_FSK_SRATE_50K default 1 if AT86RF215_MR_FSK_SRATE_100K default 2 if AT86RF215_MR_FSK_SRATE_150K default 3 if AT86RF215_MR_FSK_SRATE_200K default 4 if AT86RF215_MR_FSK_SRATE_300K default 5 if AT86RF215_MR_FSK_SRATE_400K config AT86RF215_DEFAULT_MR_FSK_MOD_IDX int "Default MR-FSK Modulation Index" range 0 128 default 64 help Default Modulation Index of the MR-FSK PHY as a fraction of 64. (32/64 = 0.5; 64/64 = 1 …) choice bool "Default MR-FSK Modulation Order" default AT86RF215_MR_FSK_MORD_4 config AT86RF215_MR_FSK_MORD_4 bool "2-FSK" config AT86RF215_MR_FSK_MORD_4 bool "4-FSK" endchoice config AT86RF215_DEFAULT_MR_FSK_MORD int default 0 if AT86RF215_MR_FSK_MORD_4 default 1 if AT86RF215_MR_FSK_MORD_4 choice bool "Default MR-FSK Forward Error Correction Scheme" default AT86RF215_MR_FSK_FEC_NONE config AT86RF215_MR_FSK_FEC_NONE bool "No forward error correction" config AT86RF215_MR_FSK_FEC_NRNS bool "Non-recursive and non-systematic code" config AT86RF215_MR_FSK_FEC_RS bool "Recursive and systematic code" endchoice config AT86RF215_DEFAULT_MR_FSK_FEC int default 0 if AT86RF215_MR_FSK_FEC_NONE default 1 if AT86RF215_MR_FSK_FEC_NRNS default 2 if AT86RF215_MR_FSK_FEC_RS endif # AT86RF215_MR_FSK choice prompt "Default Modulation" config AT86RF215_DEFAULT_LEGACY_OQPSK bool "legacy O-QPSK" depends on AT86RF215_OQPSK help O-QPSK compatible with IEEE 802.15.4-2003 devices config AT86RF215_DEFAULT_MR_OQPSK bool "MR-O-QPSK" depends on AT86RF215_MR_OQPSK help MR-O-QPSK according to IEEE 802.15.4g config AT86RF215_DEFAULT_MR_OFDM bool "MR-OFDM" depends on AT86RF215_MR_OFDM help MR-O-OFDM according to IEEE 802.15.4g config AT86RF215_DEFAULT_MR_FSK bool "MR-FSK" depends on AT86RF215_MR_FSK help MR-FSK according to IEEE 802.15.4g endchoice endmenu # Modulations config AT86RF215_BATMON_THRESHOLD int "Treshold voltage (in mV) of the battery monitor" range 1700 3675 default 1800 depends on USEMODULE_AT86RF215_BATMON help If the supply voltage falls below the configured threshold a SYS_BUS_POWER_EVENT_LOW_VOLTAGE event is generated on the SYS_BUS_POWER bus. Battery Monitoring is disabled when the device is in Deep Sleep. config AT86RF215_USE_CLOCK_OUTPUT bool "Enable clock output" help Enable this to enable the clock output pin of the AT86RF215 chip. This way it can be used as a clock source in place of a separate crystal. You also have to enable this if you want to measure the clock frequency for trimming. After proper trim value is applied this may be disabled if not used otherwise. By Default it is turned off to save energy. menuconfig AT86RF215_TRIM_VAL_EN bool "Enable crystal oscillator trimming" help Enable crystal oscillator trimming. config AT86RF215_TRIM_VAL int "Trim value for the crystal oscillator" range 0 15 default 0 depends on AT86RF215_TRIM_VAL_EN help Each increment adds 300nF capacitance between the crystal oscillator pins TCXO and XTAL2.Tweak the value until the measured clock output matches 26 MHz the best. For more information Refer Table 6-25 TRIM in Datasheet config AT86RF215_RPC_EN bool "Enable Reduced Power Consumption" help Reduce Power Consumption in RX IDLE by duty-cycling the RF circuitry. config AT86RF215_MULTIMODE bool "Allow multiple physical layer modes" default y config AT86RF215_RESET_PULSE_WIDTH_US int "Width of the reset pulse (µs)" range 16 1000 default 16 help If your board design includes a filtering capacitor on the reset line, this raises the rise time of the reset pulse. To accommodate for this, select a larger reset pulse width here. If unsure, leave this at the default value of 16 µs. endif # USEMODULE_AT86RF215