# Copyright (c) 2020 Inria
#
# This file is subject to the terms and conditions of the GNU Lesser
# General Public License v2.1. See the file LICENSE in the top level
# directory for more details.

config CPU_ARCH_RISCV
    bool
    select HAS_ARCH_RISCV
    select HAS_CPP
    select HAS_LIBSTDCPP
    select HAS_NEWLIB
    select HAS_PERIPH_CORETIMER
    select HAS_PERIPH_PLIC
    select HAS_PICOLIBC if '$(RIOT_CI_BUILD)' != '1'
    select MODULE_MALLOC_THREAD_SAFE if TEST_KCONFIG
    select HAS_SSP

config CPU_CORE_RV32I
    bool
    select CPU_ARCH_RISCV
    select HAS_ARCH_32BIT

## Definition of specific features
config HAS_ARCH_RISCV
    bool
    help
        Indicates that the current CPU has a RISC-V.

config CPU_ARCH
    default "risc-v" if CPU_ARCH_RISCV

config CPU_CORE
    default "rv32i" if CPU_CORE_RV32I