From a1f56254e32ae0546c9f9b56dc5471718abd9bf7 Mon Sep 17 00:00:00 2001 From: Gunar Schorcht Date: Fri, 9 Sep 2022 14:56:17 +0200 Subject: [PATCH 2/2] src/portable/synopsys: define SystemCoreClock variable DWC2 for STM32 uses the `SystemCoreClock` variable from CMSIS which is usually declared/defined in `system_stm32fxxx.{h,c}`and set when function SystemCoreClockUpdate is called. Since RIOT explicitely excludes these files, the variable is neither declared nor defined nor set correctly. Therefore, it is defined in `dwc2_stm32` and set to RIOT's `CLOCK_CORECLOCK` define. --- src/portable/synopsys/dwc2/dwc2_stm32.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/portable/synopsys/dwc2/dwc2_stm32.h b/src/portable/synopsys/dwc2/dwc2_stm32.h index 1187e0d6e..0c307322d 100644 --- a/src/portable/synopsys/dwc2/dwc2_stm32.h +++ b/src/portable/synopsys/dwc2/dwc2_stm32.h @@ -82,6 +82,8 @@ #error "Unsupported MCUs" #endif +#include "clk_conf.h" + // OTG HS always has higher number of endpoints than FS #ifdef USB_OTG_HS_PERIPH_BASE #define DWC2_EP_MAX EP_MAX_HS @@ -107,7 +109,7 @@ static const dwc2_controller_t _dwc2_controller[] = //--------------------------------------------------------------------+ // SystemCoreClock is alrady included by family header -// extern uint32_t SystemCoreClock; +static uint32_t SystemCoreClock = CLOCK_CORECLOCK; TU_ATTR_ALWAYS_INLINE static inline void dwc2_dcd_int_enable(uint8_t rhport) -- 2.17.1