1
0
mirror of https://github.com/RIOT-OS/RIOT.git synced 2024-12-29 04:50:03 +01:00
Commit Graph

6 Commits

Author SHA1 Message Date
Gerson Fernando Budke
91316a879a cpu/atxmega/periph/spi: Add spi driver
Introduce SPI driver.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2021-05-14 23:26:08 -03:00
Gerson Fernando Budke
1dec526d0a cpu/atxmega/periph/i2c: Add i2c driver
Add initial ATxmega i2c master driver.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2021-04-25 22:06:23 -03:00
Gerson Fernando Budke
93ed3cd9d6 cpu/atxmega: Add periph power management
The current xmega don't have a way to disable peripherals that are
not in used.  Add peripheral management to allow enable only the mcu
blocks that will be used by application.  This saves power on active
and sleep modes.  By default, at clock initialization, all peripherals
are now disabled and each drive must activate at initialization phase.
The periph_timer and periph_uart were updated with this new feature.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2021-04-02 14:24:31 -03:00
Gerson Fernando Budke
53235dd2e2 cpu/atxmega/atxmega_cpu: Fix clk sel after dfll en
The current ATxmega clock_init enable DFLL to improve the accuracy of
the 2MHz and 32MHz internal oscillators.  In some ATxmega revisions,
after started DFLL the clock become unstable.  Add another sync point
for 32MHz internal oscilator.

Note:  If clock is not stable, system won't switch from 2MHz to 32MHz
as main clock.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2021-03-28 11:40:39 -03:00
Gerson Fernando Budke
70c597620f cpu/avr8_common: Differentiate avr8 cpu cores
Current there is no way to split code between ATmega and ATxmega in
drivers.  This differentiate AVR8 cores into MEGAs and XMEGAs.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2021-03-15 20:16:10 -03:00
Gerson Fernando Budke
1a88f0bad6 cpu: Introduce Atmel xmega cpu
Add ATxmega common files and cpu definitions.

This works was originally developed by @Josar.  The 2018 version
were port to 2021 mainline.

This version changes original port to have only the atxmega CPU
definition. With that, all family can be accomodated.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2021-03-15 20:16:10 -03:00