During flash write access, the IROM cache cannot be used and is disabled therefore. During that time, ets_post crashes if a functions is called which is not in IRAM. Therefore thread_flags_set must not be called if IROM cache is disabled.
Changes of ETS task handling require the context switch by software interrupt. The context switch based on interrupt is therefore enabled by default. Furthermore, the number of priority levels are increased due to the new additional thread.
cpu/esp8266/include/periph_cpu.h overrides the default definition of adc_res_t from periph/adc with a definition which contains only one resolution. This gives compilation errorss if an application uses other resolutions. According to the documentation, adc_sample should return -1 if the resolution is not supported. All other CPUs override adc_res_t either to add new resolutions or to mark resolutions as unsupported. But they all allow to use them at the interface. Therefore, esp8266 uses now the default definition of adc_res_t and returns -1 if a solution is used in adc_sample that is not supported.
The commit
- improves the timing of the SDA and SCL signals that fixes communication problems with some slaves (#10115),
- introduces the internal function _i2c_clear which clears the bus when SDA line is locked at LOW, and
- renames internal _i2c_*_sda and _i2c_*_scl functions to function names that are more clear, e.g., _i2c_clear_sda to _i2c_sda_low.
