3 Commits

Author	SHA1	Message	Date
Karl Fessel	f8a64dfb1c	cpu/stm32: stm32f4 BRR from BSRR	2023-05-30 16:06:35 +02:00
Marian Buschsieweke	4a0c462ec3	cpu/stm32: Implement gpio_ll for STM32F1 ... This provides basic GPIO LL support. IRQ support will be added as follow up.	2023-03-20 14:14:07 +01:00
Marian Buschsieweke	8bab36f1c5	cpu/stm32: Implement periph/gpio_ll{,_irq} except for STM32F1 ... Co-authored-by: Gunar Schorcht <gunar@schorcht.net> Co-authored-by: Alexandre Abadie <alexandre.abadie@inria.fr>	2022-04-22 14:34:57 +02:00